NXPリファレンスデザイン・ライブラリ
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About This Training
Last decade has seen phenomenal advancement in processor integration and process geometry, however; the need for simple analog functions around the processors has also grown!
I2C based I/O expanders around the processor provides several advantages like optimal processor I/O utilization, routing flexibility and voltage level translation to interface with higher voltage peripherals.
NXP has continuously innovated the I/O expander family in line with evolving processor design and emerging applications, leveraging customer feedback and I2C design expertise since invention of the I2C-bus.
Watch the webinar to learn more as we dive deeper into this subject matter with experts from our high-performance analog team.
Training Outline
- I2C-bus overview and system benefits of General Purpose I/O (GPIO) Expanders
- Market trends and Design challenges addressed by NXP GPIO portfolio
- Bit Width
- Voltage range and level translation
- I/O configuration and drive
- Digital features
- Package Options
- Future: I3C
- Q&A
Presentation
What You Will Learn
- How we're continuously innovating the I/O expander family and the in's and out's of using GPIOs
Additional Resources
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