ࡱ>   Root Entry PڴCache  Cells `Pش`PشParts `Pش`Pش OrCAD Windows Library fQLQ"Arial+x BlockModify1Courier New BlockModify1ST PART FIELD2ND PART FIELD3RD PART FIELD4TH PART FIELD5TH PART FIELD6TH PART FIELD7TH PART FIELD PCB Footprintddd00Views `Pش`PشLibrary6Symbols`Pش`Pش$Types$CLASSICPart ReferenceValueLQMKL15Z128VLH4_LQFP64@"`=jLQMKL15Z128VLH4_LQFP64.Normal@"`=jLQLQLQGraphics `Pش`Pش$Types$Packages`Pش`PشExportBlocks `Pش`PشCells Directory  3Parts Directory   :Views Directory  NetBundleMapData"  Symbols Directory$Graphics Directory&Packages Directory&3ExportBlocks Directory.LQMKL15Z128VLH4_LQFP64@"`=jLQMKL15Z128VLH4_LQFP64* W. \9MKL15Z128VLH4_LQFP64MKL15Z128VLH4_LQFP64.Normalt\~=\9MKL15Z128VLH4_LQFP64.Normal0(( @9 \9VSS166!9 \9VSS2@@!9 \9VSS3JJ!9 \9VSSA||!;~;S \9PTA0/SWD_CLK/TSI0_CH1/TPM0_CH522!;};T \9PTA1/TSI0_CH2/UART0_RX/TPM2_CH0<<!;};T \9PTA2/TSI0_CH3/UART0_TX/TPM2_CH1FF!;|;\ \9'PTA3/SWD_DIO/TSI0_CH4/I2C1_SCL/TPM0_CH0PP![ \9&PTA4/N\M\I\/TSI0_CH5/I2C1_SDA/TPM0_CH1ZZ!;{;B \9 PTA5/TPM0_CH2dd!;z;C \9PTA12/TPM1_CH0nn!;z;C \9PTA13/TPM1_CH1xx!U \9 PTA18/EXTAL0/UART1_RX/TPM_CLKIN0!` \9+PTA19/XTAL0/UART1_TX/TPM_CLKIN1/LPTMR0_ALT1!E \9PTA20/R\E\S\E\T\!cate \90PTB0/LLWU_P5/ADC0_SE8/TSI0_CH0/I2C0_SCL/TPM1_CH0!] \9(PTB1/ADC0_SE9/TSI0_CH6/I2C0_SDA/TPM1_CH1!;^ \9)PTB2/ADC0_SE12/TSI0_CH7/I2C0_SCL/TPM2_CH0!ri^ \9)PTB3/ADC0_SE13/TSI0_CH8/I2C0_SDA/TPM2_CH1!nk \96PTB16/TSI0_CH9/SPI1_MOSI/UART0_RX/TPM_CLKIN0/SPI1_MISO!tpionl \97PTB17/TSI0_CH10/SPI1_MISO/UART0_TX/TPM_CLKIN1/SPI1_MOSI!;M \9PTB18/TSI0_CH11/TPM2_CH0!;M \9PTB19/TSI0_CH12/TPM2_CH1!L \9PTD0/SPI0_PCS0/TPM0_CH022!nU \9 PTD1/ADC0_SE5B/SPI0_SCK/TPM0_CH1<<!;_ \9*PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISOFF!_ \9*PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSIPP!^ \9)PTD4/LLWU_P14/SPI1_PCS0/UART2_RX/TPM0_CH4ZZ!;;^ \9)PTD5/ADC0_SE6B/SPI1_SCK/UART2_TX/TPM0_CH5dd!;i \94PTD6/LLWU_P15/ADC0_SE7B/SPI1_MOSI/UART0_RX/SPI1_MISOnn!iV \9!PTD7/SPI1_MISO/UART0_TX/SPI1_MOSIxx!>_ \9*PTE0/UART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDA!ig_ \9*PTE1/SPI1_MOSI/UART1_RX/SPI1_MISO/I2C1_SCL!;;j \95PTE16/ADC0_DP1/ADC0_SE1/SPI0_PCS0/UART2_TX/TPM_CLKIN0!iv \9APTE17/ADC0_DM1/ADC0_SE5A/SPI0_SCK/UART2_RX/TPM_CLKIN1/LPTMR0_ALT3!ii \94PTE18/ADC0_DP2/ADC0_SE2/SPI0_MOSI/I2C0_SDA/SPI0_MISO!ieonj \95PTE19/ADC0_DM2/ADC0_SE6A/SPI0_MISO/I2C0_SCL/SPI0_MOSI!i^ \9)PTE20/ADC0_DP0/ADC0_SE0/TPM1_CH0/UART0_TX!;;_ \9*PTE21/ADC0_DM0/ADC0_SE4A/TPM1_CH1/UART0_RX!;^ \9)PTE22/ADC0_DP3/ADC0_SE3/TPM2_CH0/UART2_TX!ri_ \9*PTE23/ADC0_DM3/ADC0_SE7A/TPM2_CH1/UART2_RX""!L \9PTE24/TPM0_CH0/I2C0_SCL,,!;L \9PTE25/TPM0_CH1/I2C0_SDA66!ia \9,PTE29/CMP0_IN5/ADC0_SE4B/TPM0_CH2/TPM_CLKIN0@@!;;j \95PTE30/DAC0_OUT/ADC0_SE23/CMP0_IN4/TPM0_CH3/TPM_CLKIN1JJ!C \9PTE31/TPM0_CH4TT!n9 \9VDD1,,!9 \9VDD266!;;9 \9VDD3@@!i9 \9VDDA!: \9VREFH^^!alsio: \9VREFL^^!tc_ \9*PTC0/ADC0_SE14/TSI0_CH13/EXTRG_IN/CMP0_OUT""!;;q \9<PTC1/LLWU_P6/RTC_CLKIN/ADC0_SE15/TSI0_CH14/I2C1_SCL/TPM0_CH0,,!;;_ \9*PTC2/ADC0_SE11/TSI0_CH15/I2C1_SDA/TPM0_CH166!;Z \9%PTC3/LLWU_P7/UART1_RX/TPM0_CH2/CLKOUT@@!] \9(PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/TPM0_CH3JJ!;;_ \9*PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUTTT!;;h \93PTC6/LLWU_P10/CMP0_IN0/SPI0_MOSI/EXTRG_IN/SPI0_MISO^^!;;V \9!PTC7/CMP0_IN1/SPI0_MISO/SPI0_MOSIhh!;;T \9PTC8/CMP0_IN2/I2C0_SCL/TPM0_CH4rr!;;T \9PTC9/CMP0_IN3/I2C0_SDA/TPM0_CH5||!;;C \9PTC10/I2C1_SCL!;C \9PTC11/I2C1_SDA!;;'"' '\90'"' '\9:0U. \9MKL15Z128VLH4_LQFP64U  \9MKL15Z128VLH4_LQFP64@43147162223242526272829323334353637383940414257585960616263641256789101112202117181933048131415434445464950515253545556