ࡱ>   Root Entry ৉Cache  Cells ]]Parts ]]  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJOrCAD Windows Library iQ[Q"Arial+x BlockModify1Courier New BlockModify1ST PART FIELD2ND PART FIELD3RD PART FIELD4TH PART FIELD5TH PART FIELD6TH PART FIELD7TH PART FIELD PCB Footprintddd00Views ]]Library6Symbols]]$Types$CLASSICValuePart Reference[QMKL24Z32VFM4_QFN32&r[QMKL24Z32VFM4_QFN32.Normal&r[Q[Q[QGraphics ]]$Types$Packages]]ExportBlocks ]]Cells Directory  1Parts Directory   8Views Directory  NetBundleMapData"  Symbols Directory$Graphics Directory&Packages Directory&1ExportBlocks Directory.[QMKL24Z32VFM4_QFN32&r[QS, \9MKL24Z32VFM4_QFN32MKL24Z32VFM4_QFN32.Normal_ G |;\9MKL24Z32VFM4_QFN32.Normal0(( !J \9PTA0/SWD_CLK/TPM0_CH5!iK \9PTA1/UART0_RX/TPM2_CHMKL24Z32VFM4_QFN32&0!iK \9PTA2/UART0_TX/TPM2_CH1((!S \9PTA3/SWD_DIO/I2C1_SCL/TPM0_CH022!R \9PTA4/N\M\I\/I2C1_SDA/TPM0_CH1<<!U \9 PTA18/EXTAL0/UART1_RX/TPM_CLKIN0FF!` \9+PTA19/XTAL0/UART1_TX/TPM_CLKIN1/LPTMR0_ALT1PP!\ \9'PTB0/LLWU_P5/ADC0_SE8/I2C0_SCL/TPM1_CH0nn!T \9PTB1/ADC0_SE9/I2C0_SDA/TPM1_CH1xx!g \92PTC1/LLWU_P6/RTC_CLKIN/ADC0_SE15/I2C1_SCL/TPM0_CH0!U \9 PTC2/ADC0_SE11/I2C1_SDA/TPM0_CH1!Z \9%PTC3/LLWU_P7/UART1_RX/TPM0_CH2/CLKOUT!] \9(PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/TPM0_CH3!; _ \9*PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT!; h \93PTC6/LLWU_P10/CMP0_IN0/SPI0_MOSI/EXTRG_IN/SPI0_MISO!V \9!PTC7/CMP0_IN1/SPI0_MISO/SPI0_MOSI!V \9!PTD7/SPI1_MISO/UART0_TX/SPI1_MOSIFF!i \94PTD6/LLWU_P15/ADC0_SE7B/SPI1_MOSI/UART0_RX/SPI1_MISO<<!^ \9)PTD5/ADC0_SE6B/SPI1_SCK/UART2_TX/TPM0_CH522!^ \9)PTD4/LLWU_P14/SPI1_PCS0/UART2_RX/TPM0_CH4((!cati9 \9VSS1!; \9VREGIN!; \9VOUT33!+xa \9,PTE30/ADC0_SE23/CMP0_IN4/TPM0_CH3/TPM_CLKIN1xx!< \9USB0_DP!E \9PTA20/R\E\S\E\T\ZZ!< \9USB0_DM!8 \9VDD!_ \9*PTE0/UART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDAnn!9 \9VDDA!9 \9VSS2!9 \9VSSA!; \9EX_PAD,,!'"' '\90-'"' '\90eU5, \9MKL24Z32VFM4_QFN32U \9MKL24Z32VFM4_QFN32!101112131417182021222324252627283231302926593194151716833