202104009I : i.MX RT1170 Reference Manual Update to Rev 1 and Errata Update to Rev 1.2
NXP Semiconductors announces a reference manual update to revision 1 and an errata update to revision 1.2 for i.MX RT1170. The revision history included in the updated documents provides a detailed description of the changes. Please refer to attached Change_Summary.pdf file for reference manual detail update. Errata changes are summarized below: • Added the following errata: – ERR050790: ROM: ROM does not support SEMC_DCCR register configuration from DCD • Revised the following errata: – ERR011573: Core: Speculative accesses might be performed to memory unmapped in MPU. The i.MX RT1170 reference manual revision 1 and errata revision 1.2 are attached to this notice and can be found at: https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt1170-crossover-mcu-family-first-ghz-mcu-with-arm-cortex-m7-and-cortex-m4-cores:i.MX-RT1170?tab=Documentation_Tab Corresponding ZVEI Delta Qualification Matrix ID: SEM-DS-02
| PCNタイプ | カテゴリー変更 | 発行日 | 有効期限 |
|---|---|---|---|
| Customer Information Notification | Errataother | 03-Jun-2021 | 04-Jun-2021 |
変更理由
The reference manual and errata have been updated to correct errors and / or provide additional technical clarification on some device features.
対象品番
| 品番／12NC | 最終購入日 | 最終納品日 | 交換品番 |
|---|---|---|---|
|
MIMXRT1171AVM8A (935416772557) |
- | - | - |
|
MIMXRT1171CVM8A (935416773557) |
- | - | - |
|
MIMXRT1171DVMAA (935416774557) |
- | - | - |
|
MIMXRT1172AVM8A (935416775557) |
- | - | - |
|
MIMXRT1172CVM8A (935416776557) |
- | - | - |
|
MIMXRT1172DVMAA (935416777557) |
- | - | - |
|
MIMXRT1173CVM8A (935416778557) |
- | - | - |
|
MIMXRT1175AVM8A (935416779557) |
- | - | - |
|
MIMXRT1175CVM8A (935416781557) |
- | - | - |
|
MIMXRT1175DVMAA (935416782557) |
- | - | - |
|
MIMXRT1176AVM8A (935416203557) |
- | - | - |
|
MIMXRT1176CVM8A (935416204557) |
- | - | - |
|
MIMXRT1176DVMAA (935416205557) |
- | - | - |