デザイン・ファイル
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16 Bit Automotive Microcontroller
- このページでは、新規設計を推奨しない製品に関する情報を掲載しています。
The 68HC16Z1 is a high-speed 16 bit control unit that combines high-performance data manipulation capabilities with powerful peripheral subsystems and is upwardly code compatible with the 68HC11 Family of microcontrollers. This MCU is built up from standard modules that interface through a common intermodule bus (IMB).
The 68HC16Z1 incorporates a true 16 bit central processing unit (CPU), a system integration module (SIM), an 8/10 bit analog-digital converter (ADC), a queued serial module (QSM), a general purpose timer (GPT) and a 1 Kbyte static standby RAM.
製品詳細
Features
CPU16
- 16 Bit Architecture
- Full Set of 16 Bit Registers
- Three 16 Bit Index Registers
- Two 16 Bit Accumulators
- Control-Oriented Digital Signal Processing Capability
- 1 Megabyte of Program Memory Space and 1 Megabyte of Data Memory Space
- High Level Language Support
- Fast Interrupt Response Time
- Background Debugging Mode (BDM)
- Fully Static Operation
- System Integration Module (SIM)
- External Bus Support
- Programmable Chip Select Outputs
- System Protection Logic
- Watchdog Timer, Clock Monitor and Bus Monitor
- Two 8 bit Dual Function Input/Output Ports
- One 7 bit Dual Function Output Port
- Phase-Locked Loop (PLL) Clock System
- 8/10 Bit Analog-to-Digital Converter (ADC)
- Eight analog/digital channels
- Eight result registers
- Eight automated modes
- Three result salignment modes
- 0ne 8 bit digital input port
- General Purpose Timer (GPT)
- Two 16 bit free-running counters with one nine stage prescalar
- Three input capture channels
- Four output compare channels
- One input capture / output compare channel
- One pulse accumulator/event counter input
- Two Pulse Width Modulation outputs (PWM)
- One 8 bit dual function port
- Two optional discrete inputs
- Optional external clock input
- Two Serial I/O Subsystems (QSM)
- Enhanced serial communication interface (SCI)
- Modulus baud rate generator
- Parity detection
- Queued serial peripheral interface (QSPI)
- 80 byte static RAM to perform queued operations
- Up to 16 automatic transfers
- Continuous cycling, 8 to 16 bits per transfer, LSB or MSB first
- Dual function I/O pins
- Standby RAM
- 1024 byte static RAM
- External standby voltage supply pin.
購入/パラメータ
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ドキュメント
クイック・リファレンス ドキュメンテーションの種類.
設計・リソース
ソフトウェア
クイック・リファレンス ソフトウェア・タイプ.
1 ソフトウェア・ファイル
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デバッグと可視化ツール
Background Debug Monitor
注: より快適にご利用いただくために、ソフトウェアのダウンロードはデスクトップで行うことを推奨します。