デザイン・ファイル
クイック・リファレンス
設計・ファイルの種類.
2 設計・ファイル
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シミュレーションとモデル
PCA9646PW IBIS Model
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シンボルおよびフットプリント
PCA9646PW-TSSOP16-CAD Symbol and PCB Footprint – BXL File
Buffered Four-Channel Two-Wire Bus Switch
- このページには、製造中止（生産終了）となった製品の情報が記載されています。本ページに記載されている仕様および情報は、過去の参考情報です。
The PCA9646 is a monolithic CMOS integrated circuit for 2-wire bus buffering and switching in applications including I²C-bus, SMBus, PMBus and other systems based on similar principles.
Each of the four outputs may be independently enabled in any combination as determined by the contents of the programmable control register. Each I/O is impedance isolated from all others, thus allowing a total of five branches of 2-wire bus with the maximum specified load (e.g., 5 × 400 pF for Fm+ I²C-bus at 1 MHz or 5 × 4 nF at lower frequencies) (Ref. 1). More than one PCA9646 may be used in series, providing a substantial fan-out capability.
The PCA9646 includes a unidirectional buffer for the clock signal and a bidirectional buffer for the data signal. The direction of the clock signal may also be set by the contents of the programmable control register. Clock stretching and timing must always be under control of the controller device.
The PCA9646 has excellent application to 2-wire bus address expansion and increasing of maximum load capacitance. Very large LED displays are a perfect example.
製品詳細
Features
Key Features
- Drop-in pin compatible with PCA9546A, etc.
- Each I/O is impedance isolated from all others allowing maximum capacitance on all branches
- 30 mA static sink capability on all ports
- Works with I²C-bus (standard-mode, fast-mode and fast-mode plus (Fm+)), SMBus (standard and high power mode) and PMBus
- Fast switching times allow operation in excess of 1 MHz
- Allows driving of large loads (e.g., 5 × 4 nF)
- Hysteresis on I/O increases noise immunity
- Operating voltages from 2.7 V to 5.5 V
- Uncomplicated characteristics suitable for quick implementation in most common 2-wire bus applications
- ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
ドキュメント
クイック・リファレンス ドキュメンテーションの種類.