24-Bit Fm+ I²C-Bus 100 MA 40 V LED Driver

  • このページには、製造中止(生産終了)となった製品の情報が記載されています。本ページに記載されている仕様および情報は、過去の参考情報です。

製品詳細

ブロック図

図を選択する。:

PCA9626-BD

PCA9626 Block Diagram

Block diagram: PCA9626B, PCA9626BS

Features

System Features

  • 24 LED drivers. Each output programmable at:
    • Off
    • On
    • Programmable LED brightness
    • Programmable group dimming/blinking mixed with individual LED brightness
  • 1 MHz Fast-mode Plus compatible I²C-bus interface with 30 mA high drive capability on SDA output for driving high capacitive buses
  • 256-step (8-bit) linear programmable brightness per LED output varying from fully off (default) to maximum brightness using a 97 kHz PWM signal
  • 256-step group brightness control allows general dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default)
  • 256-step group blinking with frequency programmable from 24 Hz to 10.73s and duty cycle from 0 % to 99.6 %
  • 24 open-drain outputs can sink between 0 mA to 100 mA and are tolerant to a maximum off-state voltage of 40 V. No input function
  • Output state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time (default to 'Change on STOP')
  • Active LOW Output Enable (OE) input pin allows for hardware blinking and dimming of the LEDs
  • 7 hardware address pins allow 126 PCA9626 devices to be connected to the same I²C-bus and to be individually programmed
  • 4 software programmable I²C-bus addresses (one LED Group Call address and three LED Sub Call addresses) allow groups of devices to be addressed at the same time in any combination (for example, one register used for 'All Call' so that all the PCA9626s on the I²C-bus can be addressed at the same time and the second register used for three different addresses so that 1/3 of all devices on the bus can be addressed at the same time in a group). Software enables and disables for I²C-bus address
  • A Chase Byte allows execution of predefined ON/OFF pattern for the 24 LED outputs
  • Software Reset feature (SWRST Call) allows the device to be reset through the I²C-bus
  • 25 MHz internal oscillator requires no external components
  • Internal power-on reset
  • Noise filter on SDA/SCL inputs
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current
  • Operating power supply voltage (VDD) range of 2.3 V to 5.5 V
  • 5.5 V tolerant inputs on non-LED pins
  • -40 °C to +85 °C operation
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: LQFP48

ドキュメント

クイック・リファレンス ドキュメンテーションの種類.

1-5 の 7 ドキュメント

全て表示

デザイン・ファイル

クイック・リファレンス 設計・ファイルの種類.

1 設計・ファイル

サポート

お困りのことは何ですか??