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The PCF8594C-2 is a floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 4 kbits (512 x 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I²C-bus. Up to four PCF8594C-2 devices may be connected to the I²C-bus. Chip select is accomplished by two address inputs (A1 and A2).
Timing of the E/W cycle is carried out internally, thus no external components are required. Programming Time Control (PTC), Pin 7, must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle.
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クイック・リファレンス ドキュメンテーションの種類.
1-5 の 9 ドキュメント
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