80C51 8-Bit Microcontroller

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Block diagram: P80C554SFBD, P87C554SBAA, P87C554SFAA

Block diagram: P80C554SFBD, P87C554SBAA, P87C554SFAA

Features

  • 80C51 central processing unit
  • 16k x 8 EPROM expandable externally to 64k bytes
  • An additional 16-bit timer/counter coupled to four capture registers and three compare registers
  • Two standard 16-bit timer/counters
  • 512 x 8 RAM, expandable externally to 64k bytes
  • Capable of producing eight synchronized, timed outputs
  • A 10-bit ADC with eight multiplexed analog inputs
  • Fast 8-bit ADC option
  • Two 8-bit resolution, pulse width modulation outputs
  • Five 8-bit I/O ports plus one 8-bit input port shared with analog inputs
  • I²C-bus serial I/O port with byte oriented controller and target functions
  • On-chip watchdog timer
  • Extended temperature ranges
  • Full static operation - 0 to 16 MHz
  • Operating voltage range: 2.7 V to 5.5 V (0 to 16 MHz) and 4.5 V to 5.5 V (16 to 33 MHz)
  • Three security bits
  • Encryption array - 64 bytes
  • 4 level priority interrupt
  • 15 interrupt sources
  • Full-duplex enhanced UART
    • Framing error detection
    • Automatic address recognition
  • Power control modes
    • Clock can be stopped and resumed
    • Idle mode
    • Power down mode
  • Second DPTR register
  • ALE inhibit for EMI reduction
  • Programmable I/O pins
  • Wake-up from power-down by external interrupts
  • Software reset
  • Power-on detect reset
  • ADC charge pump disable
  • ONCE mode
  • ADC active in Idle mode

部品番号: P87C554SFAA.

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