Layerscape® 2085A and 2045A Multicore Communications Processors
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The LS2 family of processors delivers unprecedented performance and integration for the smarter, more capable networks of tomorrow. The LS2045A and LS2085A multicore processors combine up to eight Arm® Cortex®- A57 cores with the advanced, high-performance datapath and network peripheral interfaces required for networking, telecom/datacom, wireless infrastructure, military and aerospace applications.
The next-generation datapath architecture combined with a powerful software toolkit provides a higher level of hardware abstraction and makes software development quick and simple.
This combination balances ease-of-use with high performance processing in a Linux® environment that is familiar to any software programmer. Customers can fully exploit the underlying hardware and easily adapt to network changes for real-time ‘soft’ control over the network.
製品詳細
比較表
Comparison Table
| LS2085A | LS2045A | |
|---|---|---|
| Cores | 8 | 4 |
| CPU A57, up to 2.0 GHz/L2 Cache (MB) | 8/4 | 4/2 |
| Packet Processing Accelerator | 20 Mp/s (four look-up stages) | |
| LS2 Switch | 88 Gb/s | |
We recommend the following Quad Port Gigabit Copper EEE PHY
| F104S8A | F104X8A | |
|---|---|---|
| Description | QSGMII PHY Standard Temperature | QSGMII PHY Extended Temperature |
| Operating Temperature (°C) | 0 - 125 | -40 - 125 |
| Package Type | 12x12, QFN, 138-pin, 0.65mm pin pitch | 12x12, QFN, 138-pin, 0.65mm pin pitch |
| Read More | Product Detail | |
ドキュメント
クイック・リファレンス ドキュメンテーションの種類.
1-5 の 12 ドキュメント
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ファクト・シート
NXP® Rebrand LS2085 Fact Sheet注目
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アプリケーション・ノート
PBL Configuration using QCVS Application Note
設計・リソース
トレーニング
3 トレーニング