Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
購入オプション
PCA85176H/Q900/1,5
アクティブ
12NC: 935290065518
詳細
数量
単価
| 1 - 24 | $1.59 |
| 25 - 25 | $1.59 |
| 26 - 99 | $1.59 |
| 100+ | $1.59 |
注文
在庫あり:1,500
代理店からの注文操作機能
| パラメータ | 値 |
|---|---|
Type Classification | Automotive LCD Drivers, LCD Segment Drivers |
Max number of elements | 160 |
Segments/elements of MUX 1:1 | 40 |
Segments/elements of MUX 1:2 | 80 |
Segments/elements of MUX 1:3 | 120 |
Segments/elements of MUX 1:4 | 160 |
I2C-bus | Y |
| パラメータ | 値 |
|---|---|
VDD1 [min] (V) | 1.8 |
VDD1 [max] (V) | 5.5 |
VLCD [min] (V) | 2.5 |
VLCD [max] (V) | 8 |
ffr | 82.0 |
Cascade for larger conf | Y |
環境
| Part/12NC | 鉛フリー | EU RoHS | ハロゲンフリー | RHFインジケーター | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
PCA85176H/Q900/1,5(935290065518) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 263.9 |
品質
| Part/12NC | 安全保障機能安全 | 吸湿感度レベル (MSL) | Peak Package Body Temperature (PPT) (C°) | フィット | MTBF | ||
|---|---|---|---|---|---|---|---|
| 鉛はんだ | 鉛フリーはんだ | 鉛はんだ | 鉛フリーはんだ | ||||
PCA85176H/Q900/1,5 (935290065518) | No | 2 | 2 | 240 | 260 | 5 | 2.0E8 |
配送
| Part/12NC | 関税分類番号（米国)免責事項: |
|---|---|
PCA85176H/Q900/1,5 (935290065518) | 854239 |
製品変更のお知らせ
| Part/12NC | 発行日 | 有効期限 | PCN | タイトル |
|---|---|---|---|---|
PCA85176H/Q900/1,5 (935290065518) | 2021-03-18 | 2021-06-10 | 202102020I | Standardization Packing Method for (H)LQFP in Reels |
PCA85176H/Q900/1,5 (935290065518) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
詳細 PCA85176
The PCA85176 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily cascaded for larger LCD applications. The PCA85176 is compatible with most microcontrollers and communicates via the two-line bidirectional I²C-bus. Communication overheads are minimized by a display RAM with auto-incremented addressing, by hardware subaddressing, and by display memory switching (static and duplex drive modes).