PCA9522DP 製品情報|NXP

購入オプション

PCA9522DP,118

製造中止

12NC: 935292436118

詳細

注文

操作機能

パラメータ
Security Status
COMPANY PUBLIC
Description
Fast dual bidirectional bus buffer with hot insertion logic
パラメータ
Number of pins
8
Package Style
TSSOP

環境

Part/12NC鉛フリーEU RoHSハロゲンフリーRHFインジケーターREACH SVHCWeight (mg)
PCA9522DP,118(935292436118)
Yes
Yes
Yes
DREACH SVHC
24.0106

品質

Part/12NC安全保障機能安全吸湿感度レベル (MSL)Peak Package Body Temperature (PPT) (C°)
鉛はんだ鉛フリーはんだ鉛はんだ鉛フリーはんだ
PCA9522DP,118
(935292436118)
No
1
1
240
260

配送

Part/12NC関税分類番号(米国)免責事項:
PCA9522DP,118
(935292436118)
854239

製造終了品・代替品データ

Part/12NC製造終了のお知らせ最終購入日 最終納品日交換
PCA9522DP,118
(935292436118)
-
2014-12-31
2015-06-30
PCA9522D,118
(935292435118)

詳細 PCA9522DP

Archived content is no longer updated and is made available for historical reference only.

The PCA9522 is a monolithic bipolar integrated circuit for bus buffering in applications including I²C-bus, SMBus, etc. It includes hot insertion logic for detecting stop and idle conditions, making it ideal for live insertion into backplanes. The buffer extends the bus load limit by buffering both the SCL and SDA lines. The PCA9522 is a drop-in replacement for the IES5502, with only the maximum bus voltage reduced from 15 V to 10 V.

Hot insertion logic allows the IC to be plugged into live backplanes without causing data corruption on the bus. The open-collector ready signal (RDY) indicates when the connection has been made. Precharging of the backplane ports minimizes disruptions to the bus during hot insertion.

The enable function allows sections of the bus to be isolated. Individual parts of the system can be brought on-line successively. Bus level translation between a very wide range of bus voltages, from 1.8 V to 10 V, is supported. These features provide enormous flexibility in interfacing systems of different technologies, operating speeds and loads.

The operation of the PCA9522 provides one of the fastest response times of such bidirectional buffers. It does this without the need for rise-time accelerators which, combined with low noise margins, may cause glitches outside of the I²C-bus specification.

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