デザイン・ファイル
クイック・リファレンス
設計・ファイルの種類.
1 設計・ファイル
完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.
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シンボルおよびフットプリント
SC28L202A1DGG-TSSOP56-CAD Symbol and PCB Footprint – BXL File
Dual Universal Asynchronous Receiver/Transmitter (DUART)
The 28L202 is a high performance dual UART. Its functional and programming features closely match but greatly extend those of previous Philips dual channel UARTs. Its configuration on power up is similar that of the SC26C92. Its differences from the SC26C92 are: 256-character receiver, 256 character transmit FIFOs, 3 V and 5 V compatibility, 8 I/O ports for each UART-16 total, arbitrating interrupt system and overall faster bus and data speeds. It is fabricated in an advanced 0.5 micron CMOS process. It is a member of the IMPACT® line of data communications parts.
Pin programming will allow the device to operate with either the Motorola or Intel bus interface by changing the function of some pins (reset is inverted, DACKN and IACKN enabled for example).
The Philips Semiconductors 28L202 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. It interfaces directly with microprocessors and may be used in a polled or interrupt driven system. The use of the Interrupt system provides intelligent interrupt vectors.
The operating mode and data format of each channel may be programmed independently. Additionally, each receiver and transmitter can select its operating speed as one of 27 fixed baud rates; a 16x clock derived from one of two programmable counter/timers or an external 1x or 16x clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems and bridges.
Each receiver and transmitter is buffered by 256 character FIFOs to nearly eliminate the potential of receiver overrun, transmitter underrun and to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability (Xon/Xoff and RTS/CTS) is provided to disable a remote transmitter when the receiver buffer is full.
Also provided on the 28L202 is a multipurpose 8-bit I/O for each channel. These can be used as general-purpose I/O ports or can be assigned specific functions (such as clock inputs or status and interrupt outputs) under program control. Normally they will be used for modem control and DMA interface. All ports have change of state detectors and input sections are always active making output signals available to the internal circuits and the control processor.
The 28L202 is available in a 52-pin TSSOP package. For other package options, contact Philips.
Outline 3d SOT364-1
製品詳細
Features
Key Features
- Member of IMPACT family: 3.3 V to 5.0 V, -40 °C to +85 °C and 80xx or 68 K bus interface (I/M modes) for all devices
- Bit-by-bit real time transmission error check for high data integrity systems
- Dual full-duplex independent asynchronous receiver/transmitters
- 256 character FIFOs for each receiver and transmitter
- Powers up to 9600 baud, 1 stop bit, no parity, 1 stop bit, interrupt disabled, all I/O set to input
- Pin programming to 68 K or 80xxx bus interface
- 16-bit programmable counter/timer
- Parity, framing and overrun error detection
- Line break detection and generation; false start bit detection
- Multi-function 8-bit I/O input port per channel loosely assigned to each channel
- Can serve as clock or control inputs
- Change of state detection on eight inputs
- Inputs have typically >100 M Ω pull-up resistors
- Modem and DMA interface
- Maximum data transfer rates: 1x - 3 Mb/s, 16x - 2 Mb/s
- Automatic wake-up mode for multi-drop applications
- Start-end break interrupt/status
- Detects break which originates in the middle of a character
- On-chip crystal oscillator
- Power down mode at less than 10 ua
- Receiver time-out mode
- Single +3.3 V or +5 V power supply
Three Character Recognition System per Channel
- General purpose character recognition
- Xon/Xoff character recognition
- Address recognition Wake up (multi-drop or '9 bit') mode
- System provides 4 levels of automation on a recognition event
Programmable Data Format
- 5 to 8 data bits plus parity and 9 bit mode
- Odd, even, no parity or force parity
- 9/16,1, 1.5 or 2 stop bits
Programmable Baud Rate for Each Receiver and Transmitter
- 27 fixed rates: 50 to 2.0 Meg baud (includes MIDI® rate)
- Other baud rates via external clocks and C/T
- Programmable user-defined rates derived from a programmable counter/timer
- External 1x or 16x clock
Programmable Channel Mode
- Normal (full-duplex)
- Automatic echo
- Local loop back
- Remote loop back
- Multi-drop mode (also called 'wake-up' or '9-bit')
Versatile Arbitrating Interrupt System
- Interrupt system totally supports 'single query' polling
- Output port can be configured to provide a total of up to six separate interrupt type outputs that may be wire-ORed (switched to open drain)
- Each FIFO can be independently programmed for any of 256 interrupt levels
- Watch dog timer for each receiver
購入/パラメータ
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ドキュメント
クイック・リファレンス ドキュメンテーションの種類.
1-5 の 12 ドキュメント
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アプリケーション・ノート
AN10380
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アプリケーション・ノート
Application of UART in GPS navigation system
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アプリケーション・ノート
UART to Bluetooth interfacing
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アプリケーション・ノート
AN10320