MC68040RC25A 製品情報|NXP

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MC68040RC25A

生産終了 (EOL)

MC68040RC25A

生産終了 (EOL)

購入オプション

操作機能

パラメータ値
Security Status
COMPANY PUBLIC
Description
32BIT W/ CACHE, MMU, FPU
パラメータ値
Number of pins
179
Package Style
PGA

環境

Part/12NC鉛フリーEU RoHSハロゲンフリーRHFインジケーター2次インターコネクトREACH SVHCWeight (mg)
MC68040RC25A(935309397157)
No
Yes
Certificate Of Analysis (CoA)
Yes
H
e4
REACH SVHC
24933.5

品質

Part/12NC安全保障機能安全
MC68040RC25A
(935309397157)
No

配送

Part/12NC関税分類番号（米国)免責事項:輸出規制品目番号（米国）
MC68040RC25A
(935309397157)
854231
3A991A2

製造終了品・代替品データ

Part/12NC製造終了のお知らせ最終購入日 最終納品日
MC68040RC25A
(935309397157)
-
2014-11-21
2015-11-21

詳細 MC68040

Archived content is no longer updated and is made available for historical reference only.

The MC68040, MC68040V, MC68LC040, and MC68EC040 are NXP® Semiconductors (formerly Motorola, Inc., Semiconductor Products Sector) fourth generation of M68000-compatible, high-performance, 32-bit microprocessors. All four devices are virtual memory microprocessors employing multiple concurrent execution units and a highly integrated architecture that provides very high performance. They integrate an MC68030-compatible integer unit (IU) and two independent caches. The MC68040, MC68040V, and MC68LC040 contain dual, independent, demand-paged memory management units (MMUs) for instruction and data stream accesses and independent, 4-Kbyte instruction and data caches. The MC68040 contains an MC68881/MC68882-compatible floating-point unit (FPU). The use of multiple independent execution pipelines, multiple internal buses, and a full internal Harvard architecture, including separate physical caches for both instruction and data accesses, achieves a high degree of instruction execution parallelism on all three processors. The on-chip bus snoop logic, which directly supports cache coherency in multileader applications, enhances cache functionality.