Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
BGA357: BGA357, plastic, ball grid array; 357 balls; 1.27 mm pitch; 25 mm x 25 mm x 2.52 mm body
12NC: 935322732557
詳細
注文
パラメータ | 値 |
---|---|
Core Type | MPC8xx |
Operating Frequency [Max] (MHz) | 50 |
Core: Number of cores (SPEC) | 1 |
パラメータ | 値 |
---|---|
External Memory Supported | EPROM, SDRAM, SRAM |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 100 |
Ethernet Type | 10/100 BaseT |
Part/12NC | 鉛フリー | EU RoHS | RHFインジケーター | 2次インターコネクト | REACH SVHC | Weight (mg) |
---|---|---|---|---|---|---|
MPC859DSLCZP50A(935322732557) | No | No | e0 | REACH SVHC | 2267.5 |
Part/12NC | 安全保障機能安全 | 吸湿感度レベル (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
---|---|---|---|---|---|---|---|
鉛はんだ | 鉛はんだ | 鉛はんだ | |||||
MPC859DSLCZP50A (935322732557) | No | 3 | 220 | 30 |
Part/12NC | 関税分類番号(米国)免責事項: | 輸出規制品目番号(米国) |
---|---|---|
MPC859DSLCZP50A (935322732557) | 854231 | 3A991A2 |
Part/12NC | 製造終了のお知らせ | 最終購入日 | 最終納品日 |
---|---|---|---|
MPC859DSLCZP50A (935322732557) | - | 2018-03-01 | 2018-09-01 |
Part/12NC | 発行日 | 有効期限 | PCN | タイトル |
---|---|---|---|---|
MPC859DSLCZP50A (935322732557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
MPC859DSLCZP50A (935322732557) | 2017-12-20 | 2018-01-03 | 201710023I | New PQ Label Input for Non-MPQ Shipments |
The MPC859DSL Integrated Communications Controller is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in CPE applications including DSL modems, IADs, and residential gateways. Like the MPC866, the MPC859DSL is a 0.18 micron version of the PowerQUICC® Family and can operate up to 66 MHz on the MPC8xx core. It has a 1.8 V core and a 3.3 V I/O operation.
The MPC859DSL is a Power Architecture-based derivative of NXP® Semiconductors' Quad Integrated Communications Controller (PowerQUICC). The embedded CPU on the MPC859DSL is the MPC8xx core, a 32-bit microprocessor built on Power Architecture technology, incorporating memory management units (MMUs) and instruction and data caches. The memory controller supports many memory types, including SDRAM. The CPM (Communications Processing Module) is optimized for CPE applications supporting simultaneous operation of Fast Ethernet (MII) and parallel ATM (UTOPIA), UTOPIA II Multi-PHY (up to 4 addresses), and many more features.