Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
12NC: 935262730528
詳細
注文
12NC: 935262730551
詳細
注文
12NC: 935262730557
詳細
注文
パラメータ | 値 |
---|---|
Application | Data Communication |
Channel | 4 |
Operating Temperature (°C) | -40~85 |
パラメータ | 値 |
---|---|
Number of pins | 80 |
Receiver/Transmitter type | Quad UARTs |
Function | SC28L198 |
Part/12NC | 鉛フリー | EU RoHS | ハロゲンフリー | RHFインジケーター | REACH SVHC | Weight (mg) |
---|---|---|---|---|---|---|
SC28L194A1BE,528(935262730528) | Yes | Yes | Yes | REACH SVHC | 552.606000000002 | |
SC28L194A1BE,551(935262730551) | Yes | Yes Certificate Of Analysis (CoA) | Yes | REACH SVHC | 552.606000000002 | |
SC28L194A1BE,557(935262730557) | Yes | Yes | Yes | REACH SVHC | 552.606000000002 |
Part/12NC | 安全保障機能安全 | 吸湿感度レベル (MSL) | Peak Package Body Temperature (PPT) (C°) | フィット | MTBF | 投資家情報 | ||
---|---|---|---|---|---|---|---|---|
鉛はんだ | 鉛フリーはんだ | 鉛はんだ | 鉛フリーはんだ | |||||
SC28L194A1BE,528 (935262730528) | No | 2 | 2 | 240 | 260 | 6.0 | 1.66666666666667E8 | 0.0 |
SC28L194A1BE,551 (935262730551) | No | 2 | 2 | 240 | 260 | 6.0 | 1.66666666666667E8 | 0.0 |
SC28L194A1BE,557 (935262730557) | No | 2 | 2 | 240 | 260 | 6.0 | 1.66666666666667E8 | 0.0 |
Part/12NC | 関税分類番号(米国)免責事項: |
---|---|
SC28L194A1BE,528 (935262730528) | 854231 |
SC28L194A1BE,551 (935262730551) | 854231 |
SC28L194A1BE,557 (935262730557) | 854231 |
Part/12NC | 製造終了のお知らせ | 最終購入日 | 最終納品日 | 交換 |
---|---|---|---|---|
SC28L194A1BE,528 (935262730528) | NOTICE | 2018-08-31 | 2018-11-30 | SC28L194A1BE,551 (935262730551) |
SC28L194A1BE,551 (935262730551) | NOTICE | 2020-06-01 | 2021-06-01 | - |
SC28L194A1BE,557 (935262730557) | NOTICE | 2018-08-31 | 2018-11-30 | SC28L194A1BE,551 (935262730551) |
Part/12NC | 発行日 | 有効期限 | PCN | タイトル |
---|---|---|---|---|
SC28L194A1BE,551 (935262730551) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
SC28L194A1BE,551 (935262730551) | 2019-05-30 | 2019-05-31 | 201905028DN | Discontinuation for NXP R01 High Performance Analog and RN3 Secure Interface Devices |
SC28L194A1BE,528 (935262730528) | 2018-12-19 | 2018-12-20 | 201711018DNU02 | Product Discontinuation Notice - Align SOIC EOL Dates |
SC28L194A1BE,557 (935262730557) |
The Philips 28L194 Quad UART is a single chip CMOS-LSI communications device that provides 4 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in-band flow control using Xon/Xoff characters defined by the user and address recognition in the Wake-up mode. Synchronous bus interface is used for all communication between host and QUART. It is fabricated in Philips state of the art CMOS technology that combines the benefits of low cost, high density and low power consumption.
The operating speed of each receiver and transmitter can be selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate). The baud rate generator and counter can operate directly from a crystal or from seven other external or internal clock inputs. The ability to independently program the operating speed of the receiver and transmitter makes the Quad UART particularly attractive for dual speed full duplex channel applications such as clustered terminal systems. The receivers and transmitters are buffered with FIFOs of 16 characters to minimize the potential for receiver overrun and to reduce interrupt overhead. In addition, a handshaking capability and in-band flow control are provided to disable a remote UART transmitter when the receiver buffer is full or nearly so.
To minimize interrupt overhead an interrupt arbitration system is included which reports the context of the interrupting UART via direct access or through the modification of the interrupt vector. The context of the interrupt is reported as channel number, type of device interrupting (receiver COS etc.) and, for transmitters or receivers, the fill level of the FIFO.
The Quad UART provides a power down mode in which the oscillator is stopped but the register contents are maintained. This results in reduced power consumption of several orders of magnitudes. The Quad UART is fully TTL compatible when operating from a single +5V or 3.3V power supply. Operation at 3.3V or 5.0V is maintained with CMOS interface levels.