デザイン・ファイル
2 設計・ファイル
完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.
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シミュレーションとモデル
PCA9561 IBIS model
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シンボルおよびフットプリント
PCA9561PW-TSSOP20-CAD Symbol and PCB Footprint – BXL File
お客様の素早い設計とより早い製品化を実現する、技術情報と専門知識をご紹介します。
The PCA9561 is a 20-pin CMOS device consisting of four 6-bit non-volatile EEPROM registers, six hardware pin inputs and a 6-bit multiplexed output. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configuration, where five preset values (four sets of internal non-volatile registers and one set of external hardware pins) set processor voltage for operation in various performance or battery conservation sleep modes. The PCA9561 is also useful in server and telecommunications/networking applications when used to replace DIP switches or jumpers, since the settings can be easily changed via I²C-bus/SMBus without having to power down the equipment to open the cabinet. The non-volatile memory retains the most current setting selected before the power is turned off.
The PCA9561 typically resides between the CPU and Voltage Regulator Module (VRM) when used for CPU VID (Voltage IDentification code) configuration. It is used to bypass the CPU-defined VID values and provide a different set of VID values to the VRM, if an increase in the CPU voltage is desired. An increase in CPU voltage combined with an increase in CPU frequency leads to a performance boost of up to 7.5 %. Lower CPU voltage reduces power consumption. The main advantage of the PCA9561 over older devices, such as the PCA9559 or PCA9560, is that it contains four internal non-volatile EEPROM registers instead of just one or two, allowing five independent settings which allows a more accurate CPU voltage tuning depending on specific applications.
The PCA9561 has two address pins, allowing up to four devices to be placed on the same I²C-bus or SMBus.
図を選択する。:
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クイック・リファレンス ドキュメンテーションの種類.
1-5 の 9 ドキュメント
セキュアファイルの読み込み中、しばらくお待ちください。
2 設計・ファイル
完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.
セキュアファイルの読み込み中、しばらくお待ちください。