MPC5746R Scalable Engine Control MCU

The MPC5746R Power Architecture^® MCU targets industrial and automotive engine/transmission control applications that require advanced performance, timing systems and functional safety capabilities. The family offers a high performance multi-core architecture with industry standard eTPU based timer system. Scalable Flash, core configurations and packaging options are available along with the highest level of functional safety (ASIL D) support.

データシート

リファレンス・マニュアル

製品詳細

ブロック図

MPC5746R 4M Block Diagram

図を取得する PDF

Features

Two independent 200MHz Power Architecture^® z4 cores
Single 200MHz z4 core in Lockstep with one of the main cores
4M Flash
320kB total SRAM
2 eTPU+ timers with 64 channels
eMIOS timer with 32 channels
Ethernet 10/100
4 Sigma Delta and 3 SAR ADC converters
Built to support functional safety (ISO 26262/ASIL D)
252 MAPBGA, 176 LQFP and 144 LQFP packages
-40 to 125C Ta Operation

MPC574xR Family Comparison Table

			MPC5746R	MPC5745R	MPC5743R
CPU	Clock	MHz	200	Up to 200	200
	Main core	number	2	2	1
	Locked step core	number	1	1	1
Flash	Code flash	KB	4,000	2,976	1,952
Flash	Data flash	KB	256	256	256
RAM	Total System RAM	KB	256	192	128
Complex Timer	eTPU	mod/ch	2/64	2/64	2/64
	eMIOS	mod/ch	2/32	2/32	2/32
	Reaction Module	ch	10	10	10
LINFlex (UART)		ch	4+2MSC	4+2MSC	3+2MSC
DSPI		ch	5+2MSC	5+2MSC	4+2MSC
SENT		ch	6	6	6
CAN	CAN 2.0	mod/MB	4/64	4/64	4/64
SAR ADC		mod/ch	4	4	4
SD ADC		mod/ch	3	3	3
DECIMATION FILTER		mod	2	2	2
PKG		-	MAPBGA252	MAPBGA252 LQFP176	LQFP176 LQFP144

購入/パラメータ

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