QorIQ® P1010 | NXP Semiconductors

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QorIQ® P1010 and P1014 Low-Power Communications Processors with Trust Architecture

P1010 製造中止
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The QorIQ® P1010 and P1014 communications processors expand QorIQ performance into cost- and power-sensitive applications. Based on 45 nm technology, the processors provide performance up to 1000 MHz and power dissipation as low as 1.1 watts, along with extensive integration and a rich set of interfaces that target cost-sensitive endpoint applications such as:

  • IP Camera
  • Industrial Robot
  • Wireless LAN (WLAN) Access Point
  • Network Attached Storage
  • Printing and Imaging
  • Router

ブロック図

P1010 BD IMG

NXP QorIQ P1010 Communication Processor Block Diagram
図を取得する PDF

Features

Core Complex

  • Single e500 core, built on Power Architecture® technology
  • 32 KB of L1 instruction cache and 32 KB of L1 data cache
  • 400 to 1000 MHz core clock frequency
  • 256 KB L2 cache with ECC, also configurable as SRAM and stashing memory

Networking Elements

  • SerDes
    • 6 lanes at up to 3.125 GHz
    • Supports SGMII, PCI Express® (PCIe) and SATA

Accelerators and Memory Control

  • 16-/32-bit DDR3 SDRAM memory controller with ECC support
  • Hardware-based cryptography acceleration (SEC4.0)
  • Up to three Gigabit Ethernet interfaces with support for IEEE® 1588
    • TCP/IP acceleration, quality of service and classification capabilities
    • Support for RGMII and SGMII

Basic Peripherals and Interconnect

  • 1 x USB controller (USB 2.0) with integrated PHY, OTG and device support
  • 2x Serial ATA (SATA2.0) controllers
  • Serial peripheral interface (SPI)
  • Trusted boot platform, integrated security
  • Four-channel DMA controller
  • 2 x I²C controllers, 2 x DUARTs, timers
  • Integrated flash controller (IFC) with enhanced capabilities to support large pages
  • 2x PCIe controllers
  • 2x FlexCAN interfaces to support industrial protocols

Additional Features

  • Trusted boot platform

もっと見る

比較表

P1010 P1014
Core Frequency 533 to 1000 MHz 400 to 800 MHz
L2 Cache 256 KB 256 KB
DDR3 16/32-bit @ 800 MHz 16-bit @ 800 MHz
GE Ports 3 2
SATA 2 2
PCI Express 2 2
Security Trusted No
CAN 2 No

購入/パラメータ

1-10 の 42 結果

除外 42 NRND

パーツ

説明を表示

注文

コンピュータ支援設計 モデル

状況

標準価格

パッケージタイプ

パッケージ端子数

コア・タイプ

コア：コア数 - 仕様

動作周波数[最大](MHz)

PCIe

対応する外部メモリ

Ambient Operating Temperature (Min to Max) (℃)

P1010NSE5DFA
データ・シート

置き換え部品: P1010NSE5DFB

生産終了 (EOL)

—

FBGA425

425

—

—

—

—

—

—

P1010NSE5DFB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

533

2

DDR3 SDRAM, DDR3L SDRAM

0 to 105

P1010NSE5FFB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

667

2

DDR3L SDRAM, DDR4 SDRAM

0 to 105

P1010NSE5HFA
データ・シート

置き換え部品: P1010NSE5HFB

生産終了 (EOL)

—

FBGA425

425

—

—

—

—

—

—

P1010NSE5HFB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

800

2

DDR3 SDRAM, DDR3L SDRAM

0 to 105

P1010NSE5HHA
データ・シート

置き換え部品: P1010NSE5HHB

生産終了 (EOL)

—

FBGA425

425

—

—

—

—

—

—

P1010NSE5HHB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

800

2

DDR3L SDRAM, DDR4 SDRAM

0 to 105

P1010NSE5KHB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

1000

2

DDR3 SDRAM, DDR3L SDRAM

0 to 105

P1010NSN5DFB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

533

2

DDR3L SDRAM, DDR4 SDRAM

0 to 105

P1010NSN5FFB
データ・シート
—

生産終了 (EOL)

—

FBGA425

425

e500

1

667

2

DDR3 SDRAM, DDR3L SDRAM

0 to 105

N true 0 PSPP1010ja 49 アプリケーション・ノート Application Note t789 26 アプリケーション・ノート・ソフトウェア Application Note Software t783 2 エンジニアリング・ブリテン Technical Notes t521 1 カタログ Brochure t518 2 サポート情報 Supporting Information t531 3 データ・シート Data Sheet t520 2 ファクト・シート Fact Sheet t523 2 ホワイト・ペーパ White Paper t530 5 ユーザ・ガイド User Guide t792 1 リファレンス・マニュアル Reference Manual t877 5 ja 3 1 1 English An overview of the QorIQ<sup>&#174;</sup> P1010 and P1014 low power communications processors. 1288028454167704719065 PSP 220.0 KB None None documents None 1288028454167704719065 /docs/en/fact-sheet/QP1010FS.pdf 219962 /docs/en/fact-sheet/QP1010FS.pdf QP1010FS N N 2016-10-31 QorIQ P1010 and P1014 Communications Processors /docs/en/fact-sheet/QP1010FS.pdf /docs/en/fact-sheet/QP1010FS.pdf Fact Sheet N Y 736675474163315314 2022-12-07 pdf N en May 30, 2013 Fact Sheet t523 ファクト・シート Fact Sheet N QorIQ P1010 and P1014 Communications Processors 2 1 English The P1010 RDB is a highly integrated reference design board aimed at low-cost networking applications (with or without trust architecture), wired and wireless access, as well as industrial and smart energy applications. 1304393005972727108304 PSP 353.5 KB None None documents None 1304393005972727108304 /docs/en/fact-sheet/P1010RDBFS.pdf 353456 /docs/en/fact-sheet/P1010RDBFS.pdf P1010RDBFS N N 2016-10-31 QorIQ P1010 RDB - Fact Sheet /docs/en/fact-sheet/P1010RDBFS.pdf /docs/en/fact-sheet/P1010RDBFS.pdf Fact Sheet N Y 736675474163315314 2022-12-07 pdf N en Sep 11, 2013 Fact Sheet t523 ファクト・シート Fact Sheet N QorIQ P1010 RDB - Fact Sheet 3 0 English The P1010 and P1014 are on a secure boot platform and offer the value of extensive integration and low power dissipation for a wide variety of applications, including cost-sensitive networking, wireless enterprise access point, network attached storage (NAS), digital video surveillance, multi-service business gateway (e.g., media server, IP/PBX-VOIP). 1307048373273729685861 PSP 627.2 KB None None documents None 1307048373273729685861 /docs/en/brochure/P1010APPBRF.pdf 627221 /docs/en/brochure/P1010APPBRF.pdf P1010APPBRF N 2016-10-31 P1010 and P1014 low-power communications processors - Brochures /docs/en/brochure/P1010APPBRF.pdf /docs/en/brochure/P1010APPBRF.pdf Brochure N Y 712453003803778552 2022-12-07 pdf en Jun 2, 2011 Brochure t518 カタログ Brochure N P1010 and P1014 low-power communications processors - Brochures false ja ja データ・シート Data Sheet 2 4 4 English This document provides the hardware specifications for P1010 QorIQ<sup>&#174;</sup> Integrated Processor. 1328517888659709521438 PSP 1.7 MB Registration without Disclaimer None documents Extended 1328517888659709521438 /secured/assets/documents/en/data-sheet/P1014EC.pdf 1720688 /secured/assets/documents/en/data-sheet/P1014EC.pdf P1014EC documents Y N 2016-10-31 P1014 QorIQ Integrated Processor Hardware Specifications - Data Sheet /webapp/Download?colCode=P1014EC&lang_cd=ja /secured/assets/documents/en/data-sheet/P1014EC.pdf Data Sheet N 980000996212993340 2023-06-18 pdf Y en May 28, 2014 980000996212993340 Data Sheet N P1014 QorIQ Integrated Processor Hardware Specifications - Data Sheet 5 4 English This document provides the hardware specifications for P1010 QorIQ<sup>&#174;</sup> Integrated Processor. 1328516463336737218992 PSP 1.8 MB Registration without Disclaimer None documents Extended 1328516463336737218992 /secured/assets/documents/en/data-sheet/P1010EC.pdf 1778491 /secured/assets/documents/en/data-sheet/P1010EC.pdf P1010EC documents Y N 2016-10-31 P1010 QorIQ Integrated Processor Hardware Specifications - Data Sheet /webapp/Download?colCode=P1010EC&lang_cd=ja /secured/assets/documents/en/data-sheet/P1010EC.pdf Data Sheet N 980000996212993340 2023-06-18 pdf Y en May 27, 2014 980000996212993340 Data Sheet N P1010 QorIQ Integrated Processor Hardware Specifications - Data Sheet リファレンス・マニュアル Reference Manual 5 6 4 English The P1010 is a cost-effective, low-power, highly integrated host processor that addresses the requirements of several routing, gateways, storage, consumer, and industrial applications. 1320750813003714349651 PSP 24.4 MB Registration without Disclaimer None documents Extended 1320750813003714349651 /secured/assets/documents/en/reference-manual/P1010RM.pdf 24415227 /secured/assets/documents/en/reference-manual/P1010RM.pdf P1010RM documents Y N 2016-10-31 P1010 QorIQ Integrated Processor Reference Manual /webapp/Download?colCode=P1010RM&lang_cd=ja /secured/assets/documents/en/reference-manual/P1010RM.pdf Reference Manual N 500633505221135046 2023-06-18 pdf Y en Aug 24, 2015 500633505221135046 Reference Manual N P1010 QorIQ Integrated Processor Reference Manual 7 4 English The P1014 is a cost-effective, low-power, highly integrated host processor that addresses the requirements of several routing, gateways, storage, consumer, and industrial applications. 1320809473633708608046 PSP 22.3 MB Registration without Disclaimer None documents Extended 1320809473633708608046 /secured/assets/documents/en/reference-manual/P1014RM.pdf 22325715 /secured/assets/documents/en/reference-manual/P1014RM.pdf P1014RM documents Y N 2016-10-31 P1014 QorIQ Integrated Processor Reference Manual /webapp/Download?colCode=P1014RM&lang_cd=ja /secured/assets/documents/en/reference-manual/P1014RM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Aug 24, 2015 500633505221135046 Reference Manual N P1014 QorIQ Integrated Processor Reference Manual 8 2 English SEC 4.4 (Security Engine) is NXP&#8217;s latest cryptographic acceleration and offloading hardware. 1320813933437716637352 PSP 5.7 MB Registration without Disclaimer None documents Extended 1320813933437716637352 /secured/assets/documents/en/reference-manual/P1010SECRM.pdf 5709982 /secured/assets/documents/en/reference-manual/P1010SECRM.pdf P1010SECRM documents Y N 2011-11-08 P1010 Security (SEC 4.4) Reference Manual /webapp/Download?colCode=P1010SECRM&lang_cd=ja /secured/assets/documents/en/reference-manual/P1010SECRM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Nov 2, 2014 500633505221135046 Reference Manual Y N P1010 Security (SEC 4.4) Reference Manual 9 1 English This reference manual describes the resources defined for the Power ISA embedded environment. 1319210247754725815434 PSP 10.4 MB Registration without Disclaimer None documents Extended 1319210247754725815434 /secured/assets/documents/en/reference-manual/EREF_RM.pdf 10448185 /secured/assets/documents/en/reference-manual/EREF_RM.pdf EREF_RM documents Y N 2016-10-31 EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual /webapp/Download?colCode=EREF_RM&lang_cd=ja /secured/assets/documents/en/reference-manual/EREF_RM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Jun 26, 2014 500633505221135046 Reference Manual Y N EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual 10 1 English The primary objective of this user&#8217;s manual is to describe the functionality of the e500 embedded microprocessor core for software and hardware developers. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words in the 64-bit general-purpose registers (GPRs). 111qmdXB PSP 5.7 MB None None documents None 111qmdXB /docs/en/reference-manual/E500CORERM.pdf 5707515 /docs/en/reference-manual/E500CORERM.pdf E500CORERM documents N 2016-10-31 PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/E500CORERM.pdf /docs/en/reference-manual/E500CORERM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en May 11, 2005 500633505221135046 Reference Manual N PowerPC ™ e500 Core Family - Reference Manual アプリケーション・ノート Application Note 26 11 0 English Provides comparison between QorIQ P1 series (P1010, P1020, P1022) and T1 series (T1024, T1014, T1023, T1013, T1040, T1020, T1042, T1022) devices. 1500876825316705874194 PSP 349.9 KB None None documents None 1500876825316705874194 /docs/en/application-note/AN5079.pdf 349919 /docs/en/application-note/AN5079.pdf AN5079 documents N N 2017-07-23 AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note /docs/en/application-note/AN5079.pdf /docs/en/application-note/AN5079.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jul 24, 2017 645036621402383989 Application Note N AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note 12 2 English This document describes the summary of the functional differences between Rev 1.0 and Rev 2.01 of the QorIQ Integrated Processors, P1010 and P1014. 1400487339763740067946 PSP 60.5 KB Registration without Disclaimer None documents Extended 1400487339763740067946 /secured/assets/documents/en/application-note/AN4938.pdf 60524 /secured/assets/documents/en/application-note/AN4938.pdf AN4938 documents Y N 2016-10-31 AN4938, Differences Between P1010 and P1014, Rev 1.0 and 2.01 - Application Notes /webapp/Download?colCode=AN4938&lang_cd=ja /secured/assets/documents/en/application-note/AN4938.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en May 26, 2017 645036621402383989 Application Note N AN4938, Differences Between P1010 and P1014, Rev 1.0 and 2.01 - Application Notes 13 0 English AN5125: A device tree is a tree structure used to describe the physical hardware in a system. Each node in the tree describes the characteristics of the device being represented. The purpose of the device tree is to describe device information in a system that cannot necessarily be dynamically detected or discovered by a client program. 1441302193437732651194 PSP 566.4 KB None None documents None 1441302193437732651194 /docs/en/application-note/AN5125.pdf 566365 /docs/en/application-note/AN5125.pdf AN5125 documents N N 2016-10-31 AN5125, Introduction to Device Trees - Application Note /docs/en/application-note/AN5125.pdf /docs/en/application-note/AN5125.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Sep 3, 2015 645036621402383989 Application Note Y N AN5125, Introduction to Device Trees - Application Note 14 4 English AN4039: This application note expands on the description of the double data rate (DDR3) memory controller programmable registers in the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> processor reference manuals. 1264810112254717714233 PSP 468.7 KB None None documents None 1264810112254717714233 /docs/en/application-note/AN4039.pdf 468655 /docs/en/application-note/AN4039.pdf AN4039 documents N N 2016-10-31 AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note /docs/en/application-note/AN4039.pdf /docs/en/application-note/AN4039.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 11, 2014 645036621402383989 Application Note N AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note 15 2 English AN4534: This document provides recommendations for new designs based on the P1010. It may also be useful in debugging newly-designed systems by highlighting those aspects of a design that merit special attention during initial system start-up. 1341223109691713232082 PSP 474.1 KB Registration without Disclaimer None documents Extended 1341223109691713232082 /secured/assets/documents/en/application-note/AN4534.pdf 474105 /secured/assets/documents/en/application-note/AN4534.pdf AN4534 documents Y N 2016-10-31 AN4534, P1010 QorIQ Integrated Processor Design Checklist - Application Notes /webapp/Download?colCode=AN4534&lang_cd=ja /secured/assets/documents/en/application-note/AN4534.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Apr 15, 2014 645036621402383989 Application Note N AN4534, P1010 QorIQ Integrated Processor Design Checklist - Application Notes 16 0 English AN4848: The PCIe bus has been gaining popularity over the last decade. Almost all of Our mid and high-end devices offer at least one PCIe port as part of their standard SOC. Most of them offer more than a single port, thus eliminating the need for an external PCIe switch. 1390372586014711432307 PSP 1.2 MB Registration without Disclaimer None documents Extended 1390372586014711432307 /secured/assets/documents/en/application-note/AN4848.pdf 1207848 /secured/assets/documents/en/application-note/AN4848.pdf AN4848 documents Y N 2016-10-31 AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes /webapp/Download?colCode=AN4848&lang_cd=ja /secured/assets/documents/en/application-note/AN4848.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Jan 21, 2014 645036621402383989 Application Note N AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes 17 2 English This document describes the requirements and step-by-step procedures for forcing the DRAM into self-refresh mode. 1363012931515701443659 PSP 269.4 KB None None documents None 1363012931515701443659 /docs/en/application-note/AN4531.pdf 269380 /docs/en/application-note/AN4531.pdf AN4531 documents N N 2016-10-31 AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes /docs/en/application-note/AN4531.pdf /docs/en/application-note/AN4531.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Dec 16, 2013 645036621402383989 Application Note N AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes 18 6 English AN3940: This document provides general hardware and layout considerations and guidelines for hardware engineers implementing a DDR3 memory subsystem. 1264793052715706871063 PSP 547.7 KB Registration without Disclaimer None documents Extended 1264793052715706871063 /secured/assets/documents/en/application-note/AN3940.pdf 547662 /secured/assets/documents/en/application-note/AN3940.pdf AN3940 documents Y N 2016-10-31 AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note /webapp/Download?colCode=AN3940&lang_cd=ja /secured/assets/documents/en/application-note/AN3940.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Nov 25, 2013 645036621402383989 Application Note Y N AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note 19 1 English This document describes how to calculate the maximum frequency and transfer formats and includes eSPI programming examples. 1329517560294722281831 PSP 216.6 KB None None documents None 1329517560294722281831 /docs/en/application-note/AN4375.pdf 216552 /docs/en/application-note/AN4375.pdf AN4375 documents N N 2016-10-31 QorIQ eSPI Controller Register Setting Considerations and Programming Examples /docs/en/application-note/AN4375.pdf /docs/en/application-note/AN4375.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jun 21, 2012 645036621402383989 Application Note N QorIQ eSPI Controller Register Setting Considerations and Programming Examples 20 2 English This document describes on-chip ROM booting from an SD card/MMC or from an EEPROM under a Linux&#13;&#10;operating system. 1229718093838710459075 PSP 334.2 KB None None documents None 1229718093838710459075 /docs/en/application-note/AN3659.pdf 334243 /docs/en/application-note/AN3659.pdf AN3659 documents N N 2016-10-31 Booting from On-Chip ROM (eSDHC or eSPI) /docs/en/application-note/AN3659.pdf /docs/en/application-note/AN3659.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jun 15, 2012 645036621402383989 Application Note N Booting from On-Chip ROM (eSDHC or eSPI) 21 0 English AN4336SW.zip /secured/assets/documents/en/application-note-software/AN4336SW.zip /webapp/Download?colCode=AN4336SW&docLang=en This document explains how to enable SD interface in u-boot and Linux on P1010 reference design board (RDB). 1311677403919703978625 PSP 64.4 KB Registration without Disclaimer None documents Extended 1311677403919703978625 /secured/assets/documents/en/application-note/AN4336.pdf 64445 /secured/assets/documents/en/application-note/AN4336.pdf AN4336 documents Y N 2016-10-31 Enabling SD Interface on P1010 Reference Design Board /webapp/Download?colCode=AN4336&lang_cd=ja /secured/assets/documents/en/application-note/AN4336.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jul 25, 2011 645036621402383989 Application Note N Enabling SD Interface on P1010 Reference Design Board 22 0 English This application note describes a procedure that allows users to validate the implementation of 1588-specific hardware in their system. 1309961595210675753552 PSP 743.2 KB None None documents None 1309961595210675753552 /docs/en/application-note/AN4326.pdf 743199 /docs/en/application-note/AN4326.pdf AN4326 documents N 2016-10-31 Verification of the IEEE 1588 Interface /docs/en/application-note/AN4326.pdf /docs/en/application-note/AN4326.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jul 6, 2011 645036621402383989 Application Note N Verification of the IEEE 1588 Interface 23 Rev. 0 English This application note describes some reference connection schemes when interfacing the third-party clock driver chip&#8217;s output with the SerDes Reference Clock inputs of PowerQUICC<sup>&#174;</sup> or QorIQ<sup>&#174;</sup> devices. It also summarizes some recommendations for PCI Express and SRIO HSSI measurement. 1305312143395731535528 PSP 577.2 KB Registration without Disclaimer None documents Extended 1305312143395731535528 /secured/assets/documents/en/application-note/AN4311.pdf 577164 /secured/assets/documents/en/application-note/AN4311.pdf AN4311 documents Y N 2016-10-31 SerDes Reference Clock Interfacing and HSSI Measurements Recommendations /webapp/Download?colCode=AN4311&lang_cd=ja /secured/assets/documents/en/application-note/AN4311.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en May 13, 2011 645036621402383989 Application Note Y N SerDes Reference Clock Interfacing and HSSI Measurements Recommendations 24 0 English 1287581868481730872047 PSP 142.0 KB None None documents None 1287581868481730872047 /docs/en/application-note/AN3423.pdf 141965 /docs/en/application-note/AN3423.pdf AN3423 documents N 2016-10-31 Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors /docs/en/application-note/AN3423.pdf /docs/en/application-note/AN3423.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 6, 2010 645036621402383989 Application Note N Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors 25 1 English This application note describes how to use and benefit from DDR memory interleaving. 1251150824863717930878 PSP 717.3 KB Registration without Disclaimer None documents Extended 1251150824863717930878 /secured/assets/documents/en/application-note/AN3939.pdf 717276 /secured/assets/documents/en/application-note/AN3939.pdf AN3939 documents Y N 2016-10-31 DDR Interleaving for PowerQUICC and QorIQ Processors /webapp/Download?colCode=AN3939&lang_cd=ja /secured/assets/documents/en/application-note/AN3939.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 30, 2010 645036621402383989 Application Note Y N DDR Interleaving for PowerQUICC and QorIQ Processors 26 1 English This application note describes basic jitter terminology and the aspects pertaining to the SYSCLK clock design requirements. 1264143083962735811350 PSP 514.4 KB None None documents None 1264143083962735811350 /docs/en/application-note/AN4056.pdf 514364 /docs/en/application-note/AN4056.pdf AN4056 documents N 2016-10-31 Understanding SYSCLK Jitter /docs/en/application-note/AN4056.pdf /docs/en/application-note/AN4056.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 18, 2010 645036621402383989 Application Note N Understanding SYSCLK Jitter 27 2 English NXP Semiconductors Power Architecture&#8482;&#13;&#10;technology-based evaluation and development platforms may optionally implement a &#8220;System ID&#8221; non-volatile memory device. This device stores important configuration data about the board. 1213738938672737755656 PSP 495.3 KB None None documents None 1213738938672737755656 /docs/en/application-note/AN3638.pdf 495318 /docs/en/application-note/AN3638.pdf AN3638 documents N N 2016-10-31 The SystemID Format for Power Architecture™ Development Systems /docs/en/application-note/AN3638.pdf /docs/en/application-note/AN3638.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 26, 2009 645036621402383989 Application Note N The SystemID Format for Power Architecture™ Development Systems 28 1 English Application Note 1060017730134725666689 PSP 612.9 KB None None documents None 1060017730134725666689 /docs/en/application-note/AN2490.pdf 612895 /docs/en/application-note/AN2490.pdf AN2490 documents N 2016-10-31 MPC603e and e500 Register Model Comparison /docs/en/application-note/AN2490.pdf /docs/en/application-note/AN2490.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 23, 2009 645036621402383989 Application Note N MPC603e and e500 Register Model Comparison 29 0 English This application note explains configuration&#13;&#10;requirements to assist users to successfully program and set up this interface type. It also compares SGMII to other gigabit Ethernet standards and interfaces. 1244236817778728476903 PSP 692.4 KB Registration without Disclaimer None documents Extended 1244236817778728476903 /secured/assets/documents/en/application-note/AN3869.pdf 692438 /secured/assets/documents/en/application-note/AN3869.pdf AN3869 documents Y N 2016-10-31 Implementing SGMII Interfaces on the PowerQUICC™ III /webapp/Download?colCode=AN3869&lang_cd=ja /secured/assets/documents/en/application-note/AN3869.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 5, 2009 645036621402383989 Application Note N Implementing SGMII Interfaces on the PowerQUICC™ III 30 0 English This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. 1198270786976715604383 PSP 547.7 KB None None documents None 1198270786976715604383 /docs/en/application-note/AN3544.pdf 547694 /docs/en/application-note/AN3544.pdf AN3544 documents N 2016-10-31 PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf /docs/en/application-note/AN3544.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 21, 2007 645036621402383989 Application Note N PowerQUICC™ Data Cache Coherency 31 1 English This document describes aspects of memory synchronization and cache coherency requirements for NXP&#8217;s PowerQUICC<sup>&#174;</sup>&#8482; III product family. Coherency and synchronization need be considered, both for data and instructions, when initializing memory or moving memory contents from one location to another. 1191253168152709402147 PSP 189.0 KB None None documents None 1191253168152709402147 /docs/en/application-note/AN3441.pdf 188954 /docs/en/application-note/AN3441.pdf AN3441 documents N 2016-10-31 Coherency and Synchronization Requirements for PowerQUICC™ III /docs/en/application-note/AN3441.pdf /docs/en/application-note/AN3441.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 17, 2007 645036621402383989 Application Note N Coherency and Synchronization Requirements for PowerQUICC™ III 32 0 English This application note provides an introduction to the error correcting code (ECC) technology as well as an aid to initialization and error recovery on Our PowerQUICC<sup>&#174;</sup> III family of processors. 1196228463425717224884 PSP 573.0 KB None None documents None 1196228463425717224884 /docs/en/application-note/AN3532.pdf 572952 /docs/en/application-note/AN3532.pdf AN3532 documents N 2016-10-31 Error Correction and Error Handling on PowerQUICC (TM) III Processors /docs/en/application-note/AN3532.pdf /docs/en/application-note/AN3532.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 27, 2007 645036621402383989 Application Note N Error Correction and Error Handling on PowerQUICC (TM) III Processors 33 0 English AN3445: This application note outlines general, high-level, architectural differences between the e300 and e500 family processors. The e300 family (which are based on the original 603 design) was designed to the original PowerPC architecture definition. The e500v1 and e500v2 processors are designed to what was originally the PowerPC Book E architecture and NXP?s embedded implementation standards (EIS). 1194389310604697206738 PSP 935.0 KB None None documents None 1194389310604697206738 /docs/en/application-note/AN3445.pdf 934951 /docs/en/application-note/AN3445.pdf AN3445 documents N 2016-10-31 AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3445.pdf /docs/en/application-note/AN3445.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 31, 2007 645036621402383989 Application Note N AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes 34 0 English AN3531: This application note outlines general, high-level, architectural differences between the e600 and e500 family processors. Is intended as a general guideline for programmers and system designers who are assessing the efforts required in migrating to e500-based devices. 1194389312415718217914 PSP 961.6 KB None None documents None 1194389312415718217914 /docs/en/application-note/AN3531.pdf 961596 /docs/en/application-note/AN3531.pdf AN3531 documents N N 2016-10-31 AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3531.pdf /docs/en/application-note/AN3531.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 31, 2007 645036621402383989 Application Note N AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes 35 2 English These design guidelines are applicable for products that leverage the DDR2 SDRAM IP core, and are based on a compilation of internal platforms designed by NXP Semiconductors, Inc. These guidelines are constructed in such a fashion as to minimize board-related issues across multiple memory topologies while allowing maximum flexibility for the board designer. 1128961595061725581551 PSP 619.7 KB None None documents None 1128961595061725581551 /docs/en/application-note/AN2910.pdf 619650 /docs/en/application-note/AN2910.pdf AN2910 documents N 2016-10-31 Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces /docs/en/application-note/AN2910.pdf /docs/en/application-note/AN2910.pdf Application Note N 645036621402383989 2022-12-07 pdf en Mar 27, 2007 645036621402383989 Application Note N Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces 36 0 English AN2665: This application note provides information to programmers so that they may write optimal code for the PowerPC ? e500 embedded microprocessor cores. The e500 core implements the Book E version of the PowerPC architecture. In addition, the e500 core adheres to the NXP Book E implementation standards (EIS). These standards were developed to ensure consistency among NXP?s Book E implementations. 1112972998032717039588 PSP 799.6 KB None None documents None 1112972998032717039588 /docs/en/application-note/AN2665.pdf 799625 /docs/en/application-note/AN2665.pdf AN2665 documents N 2016-10-31 AN2665, e500 Software Optimization Guide (eSOG) - Application Notes /docs/en/application-note/AN2665.pdf /docs/en/application-note/AN2665.pdf Application Note N 645036621402383989 2022-12-07 pdf en Apr 8, 2005 645036621402383989 Application Note N AN2665, e500 Software Optimization Guide (eSOG) - Application Notes ユーザ・ガイド User Guide 1 37 1 Y English https://docs.nxp.com/bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html Y 1576719019599707128294 PSP None None documents None 1576719019599707128294 /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC SPECTRE-MELTDOWN-POWER-ISA-DOC documents N N Y 2019-12-18 Spectre and Meltdown Updates for Power ISA Cores https://docs.nxp.com/bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC User Guide N 132339537837198660 Y /bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html 2022-12-07 N en Nov 14, 2019 132339537837198660 User Guide Y N Spectre and Meltdown Updates for Power ISA Cores アプリケーション・ノート・ソフトウェア Application Note Software 2 38 0 English 1311155043387708285937 PSP 4.0 KB Registration without Disclaimer None documents Extended 1311155043387708285937 /secured/assets/documents/en/application-note-software/AN4336SW.zip 3960 /secured/assets/documents/en/application-note-software/AN4336SW.zip AN4336SW documents Y N 2016-10-31 Enabling SD Interface on P1010 Reference Design Board /webapp/Download?colCode=AN4336SW&lang_cd=ja /secured/assets/documents/en/application-note-software/AN4336SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Jul 19, 2011 789425793691620447 Application Note Software N Enabling SD Interface on P1010 Reference Design Board 39 0 English This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. 1181767584945705509512 PSP 163.7 KB None None documents None 1181767584945705509512 /docs/en/application-note-software/AN3372.pdf 163681 /docs/en/application-note-software/AN3372.pdf AN3372 documents N 2016-10-31 Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf /docs/en/application-note-software/AN3372.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en Jun 13, 2007 789425793691620447 Application Note Software N Challenges in Testing for Power Rail Shorts with New Technologies カタログ Brochure 1 40 0 English 1326753923169722820717 PSP 477.8 KB None None documents None 1326753923169722820717 /docs/en/brochure/PWRARBYNDBITSTA.pdf 477805 /docs/en/brochure/PWRARBYNDBITSTA.pdf PWRARBYNDBITSTA documents N 2016-10-31 Trust Architecture: Freescale’s Security Solution for Industrial Control Systems (ICS) /docs/en/brochure/PWRARBYNDBITSTA.pdf /docs/en/brochure/PWRARBYNDBITSTA.pdf Brochure N 712453003803778552 2022-12-07 pdf en Feb 7, 2012 712453003803778552 Brochure N Trust Architecture: Freescale’s Security Solution for Industrial Control Systems (ICS) エンジニアリング・ブリテン Technical Notes 1 41 0 English Provides a COMe pin-out for QorIQ<sup>&#174;</sup> devices 1299186935006725024525 PSP 492.6 KB Registration without Disclaimer None documents Extended 1299186935006725024525 /secured/assets/documents/en/engineering-bulletin/EB739.pdf 492591 /secured/assets/documents/en/engineering-bulletin/EB739.pdf EB739 documents Y N 2016-10-31 COM Express Pin Assignments for QorIQ Devices /webapp/Download?colCode=EB739&lang_cd=ja /secured/assets/documents/en/engineering-bulletin/EB739.pdf Technical Notes N 389245547230346745 2022-12-07 pdf Y en Mar 3, 2011 389245547230346745 Technical Notes N COM Express Pin Assignments for QorIQ Devices サポート情報 Supporting Information 3 42 1.9 English FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. 1368836090577704535160 PSP 303.5 KB None None documents None 1368836090577704535160 /docs/en/supporting-information/FSLNISTCAVP.pdf 303546 /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP documents N N 2016-11-09 FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf /docs/en/supporting-information/FSLNISTCAVP.pdf Supporting Information N 371282830530968666 2022-12-07 pdf N en Oct 28, 2016 371282830530968666 Supporting Information Y N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 43 1 English 1329832951617703551255 PSP 4.8 MB None None documents None 1329832951617703551255 /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf 4770262 /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf P1010_MGRTN_DCM documents N N 2012-02-21 Migrating from PowerQUICC<sup>&#174;</sup> II Pro to QorIQ<sup>&#174;</sup>&#8217;s P1010 /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf Supporting Information N 371282830530968666 2022-12-07 pdf N en Feb 21, 2012 371282830530968666 Supporting Information Y N Migrating from PowerQUICC<sup>&#174;</sup> II Pro to QorIQ<sup>&#174;</sup>&#8217;s P1010 44 0 English 1292347735470711488943 PSP 22.7 KB None None documents None 1292347735470711488943 /docs/en/supporting-information/P1010_1014PECI.pdf 22681 /docs/en/supporting-information/P1010_1014PECI.pdf P1010_1014PECI documents N N 2016-10-31 P1010_1014 Family Customer Export Control Information /docs/en/supporting-information/P1010_1014PECI.pdf /docs/en/supporting-information/P1010_1014PECI.pdf Supporting Information N 371282830530968666 2023-06-19 pdf N en Dec 10, 2010 371282830530968666 Supporting Information Y N P1010_1014 Family Customer Export Control Information ホワイト・ペーパ White Paper 5 45 0 English In this paper, we present the mitigations for Spectre variant 1 and Spectre variant 2 for NXP PowerPC processors. The NXP PowerPC processors are not vulnerable to the Meltdown attack, Spectre variant 1.1/1.2, or Spectre variant 4. 1580452712610724357770 PSP 317.1 KB None None documents None 1580452712610724357770 /docs/en/white-paper/SPECTREPPCWP.pdf 317053 /docs/en/white-paper/SPECTREPPCWP.pdf SPECTREPPCWP documents N N 2020-01-30 Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper /docs/en/white-paper/SPECTREPPCWP.pdf /docs/en/white-paper/SPECTREPPCWP.pdf White Paper N 918633085541740938 2022-12-07 pdf N en Jan 30, 2020 918633085541740938 White Paper Y N Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper 46 0 English QORIQPMWP: This document describes how Power Management technologies will play a more important role in controlling or reducing power consumption of electronic systems. 1419964678458711207150 PSP 1.4 MB None None documents None 1419964678458711207150 /docs/en/white-paper/QORIQPMWP.pdf 1418055 /docs/en/white-paper/QORIQPMWP.pdf QORIQPMWP documents N N 2017-03-30 QORIQPMWP, QorIQ Power Management - White Paper /docs/en/white-paper/QORIQPMWP.pdf /docs/en/white-paper/QORIQPMWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Mar 30, 2017 918633085541740938 White Paper N QORIQPMWP, QorIQ Power Management - White Paper 47 1 English Security continues to be an increasingly important concern in the design of modern systems. Threats against networks and network-connected&#13;&#10;devices are real and growing. With an estimated $40 billion (USD)* of data loss per year, service providers and end-users are becoming painfully&#13;&#10;aware of the consequences of unsecured networks and databases. 1317136062337713598350 PSP 494.4 KB None None documents None 1317136062337713598350 /docs/en/white-paper/QORIQSECBOOTWP.pdf 494394 /docs/en/white-paper/QORIQSECBOOTWP.pdf QORIQSECBOOTWP documents N N 2016-10-31 Secure Boot - White Paper /docs/en/white-paper/QORIQSECBOOTWP.pdf /docs/en/white-paper/QORIQSECBOOTWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Jan 25, 2013 918633085541740938 White Paper N Secure Boot - White Paper 48 0 English The past few years have witnessed explosive&#13;&#10;growth in the flash memory market, driven by&#13;&#10;the use of wireless communication devices,&#13;&#10;networking and communication products,&#13;&#10;security systems and other types of electronic&#13;&#10;equipment (PDAs, digital cameras, MP3 audio&#13;&#10;players). In the next few years, system designs&#13;&#10;will demand even more non-volatile memories,&#13;&#10;either with high density and very high writing&#13;&#10;throughput for data storage a 1313524709471728984206 PSP 673.3 KB None None documents None 1313524709471728984206 /docs/en/white-paper/INTFCWP.pdf 673312 /docs/en/white-paper/INTFCWP.pdf INTFCWP documents N N 2016-10-31 Integrated Flash Controller /docs/en/white-paper/INTFCWP.pdf /docs/en/white-paper/INTFCWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Aug 16, 2011 918633085541740938 White Paper N Integrated Flash Controller 49 2 English This paper discusses the objectives of the trust architecture, how it works, and logistical considerations. 1283981132878727112937 PSP 650.6 KB Registration without Disclaimer None documents Extended 1283981132878727112937 /secured/assets/documents/en/white-paper/QORIQTAWP.pdf 650609 /secured/assets/documents/en/white-paper/QORIQTAWP.pdf QORIQTAWP documents Y N 2016-10-31 An Introduction to the QorIQ Platform's Trust Architecture /webapp/Download?colCode=QORIQTAWP&lang_cd=ja /secured/assets/documents/en/white-paper/QORIQTAWP.pdf White Paper N 918633085541740938 2022-12-07 pdf Y en May 10, 2011 918633085541740938 White Paper Y N An Introduction to the QorIQ Platform's Trust Architecture false 0 P1010 downloads ja true 1 Y PSP アプリケーション・ノート 26 /docs/en/application-note/AN5079.pdf 2017-07-23 1500876825316705874194 PSP 11 Jul 24, 2017 Application Note Provides comparison between QorIQ P1 series (P1010, P1020, P1022) and T1 series (T1024, T1014, T1023, T1013, T1040, T1020, T1042, T1022) devices. None /docs/en/application-note/AN5079.pdf English documents 349919 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN5079.pdf AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note /docs/en/application-note/AN5079.pdf documents 645036621402383989 Application Note N en None pdf 0 N N AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note 349.9 KB AN5079 N 1500876825316705874194 /secured/assets/documents/en/application-note/AN4938.pdf 2016-10-31 1400487339763740067946 PSP 12 May 26, 2017 Application Note This document describes the summary of the functional differences between Rev 1.0 and Rev 2.01 of the QorIQ Integrated Processors, P1010 and P1014. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4938.pdf English documents 60524 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN4938&lang_cd=ja AN4938, Differences Between P1010 and P1014, Rev 1.0 and 2.01 - Application Notes /secured/assets/documents/en/application-note/AN4938.pdf documents 645036621402383989 Application Note N en Extended pdf 2 Y N AN4938, Differences Between P1010 and P1014, Rev 1.0 and 2.01 - Application Notes 60.5 KB AN4938 N 1400487339763740067946 /docs/en/application-note/AN5125.pdf 2016-10-31 1441302193437732651194 PSP 13 Sep 3, 2015 Application Note AN5125: A device tree is a tree structure used to describe the physical hardware in a system. Each node in the tree describes the characteristics of the device being represented. The purpose of the device tree is to describe device information in a system that cannot necessarily be dynamically detected or discovered by a client program. None /docs/en/application-note/AN5125.pdf English documents 566365 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN5125.pdf AN5125, Introduction to Device Trees - Application Note /docs/en/application-note/AN5125.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN5125, Introduction to Device Trees - Application Note 566.4 KB AN5125 N 1441302193437732651194 /docs/en/application-note/AN4039.pdf 2016-10-31 1264810112254717714233 PSP 14 Nov 11, 2014 Application Note AN4039: This application note expands on the description of the double data rate (DDR3) memory controller programmable registers in the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> processor reference manuals. None /docs/en/application-note/AN4039.pdf English documents 468655 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN4039.pdf AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note /docs/en/application-note/AN4039.pdf documents 645036621402383989 Application Note N en None pdf 4 N N AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note 468.7 KB AN4039 N 1264810112254717714233 /secured/assets/documents/en/application-note/AN4534.pdf 2016-10-31 1341223109691713232082 PSP 15 Apr 15, 2014 Application Note AN4534: This document provides recommendations for new designs based on the P1010. It may also be useful in debugging newly-designed systems by highlighting those aspects of a design that merit special attention during initial system start-up. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4534.pdf English documents 474105 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN4534&lang_cd=ja AN4534, P1010 QorIQ Integrated Processor Design Checklist - Application Notes /secured/assets/documents/en/application-note/AN4534.pdf documents 645036621402383989 Application Note N en Extended pdf 2 Y N AN4534, P1010 QorIQ Integrated Processor Design Checklist - Application Notes 474.1 KB AN4534 N 1341223109691713232082 /secured/assets/documents/en/application-note/AN4848.pdf 2016-10-31 1390372586014711432307 PSP 16 Jan 21, 2014 Application Note AN4848: The PCIe bus has been gaining popularity over the last decade. Almost all of Our mid and high-end devices offer at least one PCIe port as part of their standard SOC. Most of them offer more than a single port, thus eliminating the need for an external PCIe switch. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4848.pdf English documents 1207848 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN4848&lang_cd=ja AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes /secured/assets/documents/en/application-note/AN4848.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes 1.2 MB AN4848 N 1390372586014711432307 /docs/en/application-note/AN4531.pdf 2016-10-31 1363012931515701443659 PSP 17 Dec 16, 2013 Application Note This document describes the requirements and step-by-step procedures for forcing the DRAM into self-refresh mode. None /docs/en/application-note/AN4531.pdf English documents 269380 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN4531.pdf AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes /docs/en/application-note/AN4531.pdf documents 645036621402383989 Application Note N en None pdf 2 N N AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes 269.4 KB AN4531 N 1363012931515701443659 /secured/assets/documents/en/application-note/AN3940.pdf 2016-10-31 1264793052715706871063 PSP 18 Nov 25, 2013 Application Note AN3940: This document provides general hardware and layout considerations and guidelines for hardware engineers implementing a DDR3 memory subsystem. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3940.pdf English documents 547662 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN3940&lang_cd=ja AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note /secured/assets/documents/en/application-note/AN3940.pdf documents 645036621402383989 Application Note N en Extended Y pdf 6 Y N AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note 547.7 KB AN3940 N 1264793052715706871063 /docs/en/application-note/AN4375.pdf 2016-10-31 1329517560294722281831 PSP 19 Jun 21, 2012 Application Note This document describes how to calculate the maximum frequency and transfer formats and includes eSPI programming examples. None /docs/en/application-note/AN4375.pdf English documents 216552 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN4375.pdf QorIQ eSPI Controller Register Setting Considerations and Programming Examples /docs/en/application-note/AN4375.pdf documents 645036621402383989 Application Note N en None pdf 1 N N QorIQ eSPI Controller Register Setting Considerations and Programming Examples 216.6 KB AN4375 N 1329517560294722281831 /docs/en/application-note/AN3659.pdf 2016-10-31 1229718093838710459075 PSP 20 Jun 15, 2012 Application Note This document describes on-chip ROM booting from an SD card/MMC or from an EEPROM under a Linux&#13;&#10;operating system. None /docs/en/application-note/AN3659.pdf English documents 334243 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3659.pdf Booting from On-Chip ROM (eSDHC or eSPI) /docs/en/application-note/AN3659.pdf documents 645036621402383989 Application Note N en None pdf 2 N N Booting from On-Chip ROM (eSDHC or eSPI) 334.2 KB AN3659 N 1229718093838710459075 /secured/assets/documents/en/application-note/AN4336.pdf 2016-10-31 1311677403919703978625 PSP 21 Jul 25, 2011 Application Note This document explains how to enable SD interface in u-boot and Linux on P1010 reference design board (RDB). Registration without Disclaimer /secured/assets/documents/en/application-note/AN4336.pdf English documents 64445 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN4336&lang_cd=ja Enabling SD Interface on P1010 Reference Design Board /secured/assets/documents/en/application-note/AN4336.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N Enabling SD Interface on P1010 Reference Design Board 64.4 KB AN4336 N 1311677403919703978625 /docs/en/application-note/AN4326.pdf 2016-10-31 1309961595210675753552 PSP 22 Jul 6, 2011 Application Note This application note describes a procedure that allows users to validate the implementation of 1588-specific hardware in their system. None /docs/en/application-note/AN4326.pdf English documents 743199 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4326.pdf Verification of the IEEE 1588 Interface /docs/en/application-note/AN4326.pdf documents 645036621402383989 Application Note N en None pdf 0 N Verification of the IEEE 1588 Interface 743.2 KB AN4326 N 1309961595210675753552 /secured/assets/documents/en/application-note/AN4311.pdf 2016-10-31 1305312143395731535528 PSP 23 May 13, 2011 Application Note This application note describes some reference connection schemes when interfacing the third-party clock driver chip&#8217;s output with the SerDes Reference Clock inputs of PowerQUICC<sup>&#174;</sup> or QorIQ<sup>&#174;</sup> devices. It also summarizes some recommendations for PCI Express and SRIO HSSI measurement. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4311.pdf English documents 577164 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN4311&lang_cd=ja SerDes Reference Clock Interfacing and HSSI Measurements Recommendations /secured/assets/documents/en/application-note/AN4311.pdf documents 645036621402383989 Application Note N en Extended Y pdf Rev. 0 Y N SerDes Reference Clock Interfacing and HSSI Measurements Recommendations 577.2 KB AN4311 N 1305312143395731535528 /docs/en/application-note/AN3423.pdf 2016-10-31 1287581868481730872047 PSP 24 Oct 6, 2010 Application Note None /docs/en/application-note/AN3423.pdf English documents 141965 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3423.pdf Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors /docs/en/application-note/AN3423.pdf documents 645036621402383989 Application Note N en None pdf 0 N Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors 142.0 KB AN3423 N 1287581868481730872047 /secured/assets/documents/en/application-note/AN3939.pdf 2016-10-31 1251150824863717930878 PSP 25 Jun 30, 2010 Application Note This application note describes how to use and benefit from DDR memory interleaving. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3939.pdf English documents 717276 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3939&lang_cd=ja DDR Interleaving for PowerQUICC and QorIQ Processors /secured/assets/documents/en/application-note/AN3939.pdf documents 645036621402383989 Application Note N en Extended Y pdf 1 Y N DDR Interleaving for PowerQUICC and QorIQ Processors 717.3 KB AN3939 N 1251150824863717930878 /docs/en/application-note/AN4056.pdf 2016-10-31 1264143083962735811350 PSP 26 Feb 18, 2010 Application Note This application note describes basic jitter terminology and the aspects pertaining to the SYSCLK clock design requirements. None /docs/en/application-note/AN4056.pdf English documents 514364 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4056.pdf Understanding SYSCLK Jitter /docs/en/application-note/AN4056.pdf documents 645036621402383989 Application Note N en None pdf 1 N Understanding SYSCLK Jitter 514.4 KB AN4056 N 1264143083962735811350 /docs/en/application-note/AN3638.pdf 2016-10-31 1213738938672737755656 PSP 27 Oct 26, 2009 Application Note NXP Semiconductors Power Architecture&#8482;&#13;&#10;technology-based evaluation and development platforms may optionally implement a &#8220;System ID&#8221; non-volatile memory device. This device stores important configuration data about the board. None /docs/en/application-note/AN3638.pdf English documents 495318 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3638.pdf The SystemID Format for Power Architecture™ Development Systems /docs/en/application-note/AN3638.pdf documents 645036621402383989 Application Note N en None pdf 2 N N The SystemID Format for Power Architecture™ Development Systems 495.3 KB AN3638 N 1213738938672737755656 /docs/en/application-note/AN2490.pdf 2016-10-31 1060017730134725666689 PSP 28 Sep 23, 2009 Application Note Application Note None /docs/en/application-note/AN2490.pdf English documents 612895 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2490.pdf MPC603e and e500 Register Model Comparison /docs/en/application-note/AN2490.pdf documents 645036621402383989 Application Note N en None pdf 1 N MPC603e and e500 Register Model Comparison 612.9 KB AN2490 N 1060017730134725666689 /secured/assets/documents/en/application-note/AN3869.pdf 2016-10-31 1244236817778728476903 PSP 29 Jun 5, 2009 Application Note This application note explains configuration&#13;&#10;requirements to assist users to successfully program and set up this interface type. It also compares SGMII to other gigabit Ethernet standards and interfaces. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3869.pdf English documents 692438 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3869&lang_cd=ja Implementing SGMII Interfaces on the PowerQUICC™ III /secured/assets/documents/en/application-note/AN3869.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N Implementing SGMII Interfaces on the PowerQUICC™ III 692.4 KB AN3869 N 1244236817778728476903 /docs/en/application-note/AN3544.pdf 2016-10-31 1198270786976715604383 PSP 30 Dec 21, 2007 Application Note This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. None /docs/en/application-note/AN3544.pdf English documents 547694 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3544.pdf PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf documents 645036621402383989 Application Note N en None pdf 0 N PowerQUICC™ Data Cache Coherency 547.7 KB AN3544 N 1198270786976715604383 /docs/en/application-note/AN3441.pdf 2016-10-31 1191253168152709402147 PSP 31 Dec 17, 2007 Application Note This document describes aspects of memory synchronization and cache coherency requirements for NXP&#8217;s PowerQUICC<sup>&#174;</sup>&#8482; III product family. Coherency and synchronization need be considered, both for data and instructions, when initializing memory or moving memory contents from one location to another. None /docs/en/application-note/AN3441.pdf English documents 188954 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3441.pdf Coherency and Synchronization Requirements for PowerQUICC™ III /docs/en/application-note/AN3441.pdf documents 645036621402383989 Application Note N en None pdf 1 N Coherency and Synchronization Requirements for PowerQUICC™ III 189.0 KB AN3441 N 1191253168152709402147 /docs/en/application-note/AN3532.pdf 2016-10-31 1196228463425717224884 PSP 32 Nov 27, 2007 Application Note This application note provides an introduction to the error correcting code (ECC) technology as well as an aid to initialization and error recovery on Our PowerQUICC<sup>&#174;</sup> III family of processors. None /docs/en/application-note/AN3532.pdf English documents 572952 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3532.pdf Error Correction and Error Handling on PowerQUICC (TM) III Processors /docs/en/application-note/AN3532.pdf documents 645036621402383989 Application Note N en None pdf 0 N Error Correction and Error Handling on PowerQUICC (TM) III Processors 573.0 KB AN3532 N 1196228463425717224884 /docs/en/application-note/AN3445.pdf 2016-10-31 1194389310604697206738 PSP 33 Oct 31, 2007 Application Note AN3445: This application note outlines general, high-level, architectural differences between the e300 and e500 family processors. The e300 family (which are based on the original 603 design) was designed to the original PowerPC architecture definition. The e500v1 and e500v2 processors are designed to what was originally the PowerPC Book E architecture and NXP?s embedded implementation standards (EIS). None /docs/en/application-note/AN3445.pdf English documents 934951 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3445.pdf AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3445.pdf documents 645036621402383989 Application Note N en None pdf 0 N AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes 935.0 KB AN3445 N 1194389310604697206738 /docs/en/application-note/AN3531.pdf 2016-10-31 1194389312415718217914 PSP 34 Oct 31, 2007 Application Note AN3531: This application note outlines general, high-level, architectural differences between the e600 and e500 family processors. Is intended as a general guideline for programmers and system designers who are assessing the efforts required in migrating to e500-based devices. None /docs/en/application-note/AN3531.pdf English documents 961596 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3531.pdf AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3531.pdf documents 645036621402383989 Application Note N en None pdf 0 N N AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes 961.6 KB AN3531 N 1194389312415718217914 /docs/en/application-note/AN2910.pdf 2016-10-31 1128961595061725581551 PSP 35 Mar 27, 2007 Application Note These design guidelines are applicable for products that leverage the DDR2 SDRAM IP core, and are based on a compilation of internal platforms designed by NXP Semiconductors, Inc. These guidelines are constructed in such a fashion as to minimize board-related issues across multiple memory topologies while allowing maximum flexibility for the board designer. None /docs/en/application-note/AN2910.pdf English documents 619650 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2910.pdf Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces /docs/en/application-note/AN2910.pdf documents 645036621402383989 Application Note N en None pdf 2 N Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces 619.7 KB AN2910 N 1128961595061725581551 /docs/en/application-note/AN2665.pdf 2016-10-31 1112972998032717039588 PSP 36 Apr 8, 2005 Application Note AN2665: This application note provides information to programmers so that they may write optimal code for the PowerPC ? e500 embedded microprocessor cores. The e500 core implements the Book E version of the PowerPC architecture. In addition, the e500 core adheres to the NXP Book E implementation standards (EIS). These standards were developed to ensure consistency among NXP?s Book E implementations. None /docs/en/application-note/AN2665.pdf English documents 799625 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2665.pdf AN2665, e500 Software Optimization Guide (eSOG) - Application Notes /docs/en/application-note/AN2665.pdf documents 645036621402383989 Application Note N en None pdf 0 N AN2665, e500 Software Optimization Guide (eSOG) - Application Notes 799.6 KB AN2665 N 1112972998032717039588 アプリケーション・ノート・ソフトウェア 2 /secured/assets/documents/en/application-note-software/AN4336SW.zip 2016-10-31 1311155043387708285937 PSP 38 Jul 19, 2011 Application Note Software Registration without Disclaimer /secured/assets/documents/en/application-note-software/AN4336SW.zip English documents 3960 None 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN4336SW&lang_cd=ja Enabling SD Interface on P1010 Reference Design Board /secured/assets/documents/en/application-note-software/AN4336SW.zip documents 789425793691620447 Application Note Software N en Extended zip 0 Y N Enabling SD Interface on P1010 Reference Design Board 4.0 KB AN4336SW N 1311155043387708285937 /docs/en/application-note-software/AN3372.pdf 2016-10-31 1181767584945705509512 PSP 39 Jun 13, 2007 Application Note Software This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. None /docs/en/application-note-software/AN3372.pdf English documents 163681 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3372.pdf Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf documents 789425793691620447 Application Note Software N en None pdf 0 N Challenges in Testing for Power Rail Shorts with New Technologies 163.7 KB AN3372 N 1181767584945705509512 エンジニアリング・ブリテン 1 /secured/assets/documents/en/engineering-bulletin/EB739.pdf 2016-10-31 1299186935006725024525 PSP 41 Mar 3, 2011 Technical Notes Provides a COMe pin-out for QorIQ<sup>&#174;</sup> devices Registration without Disclaimer /secured/assets/documents/en/engineering-bulletin/EB739.pdf English documents 492591 None 389245547230346745 2022-12-07 Y /webapp/Download?colCode=EB739&lang_cd=ja COM Express Pin Assignments for QorIQ Devices /secured/assets/documents/en/engineering-bulletin/EB739.pdf documents 389245547230346745 Technical Notes N en Extended pdf 0 Y N COM Express Pin Assignments for QorIQ Devices 492.6 KB EB739 N 1299186935006725024525 カタログ 2 /docs/en/brochure/PWRARBYNDBITSTA.pdf 2016-10-31 1326753923169722820717 PSP 40 Feb 7, 2012 Brochure None /docs/en/brochure/PWRARBYNDBITSTA.pdf English documents 477805 None 712453003803778552 2022-12-07 /docs/en/brochure/PWRARBYNDBITSTA.pdf Trust Architecture: Freescale’s Security Solution for Industrial Control Systems (ICS) /docs/en/brochure/PWRARBYNDBITSTA.pdf documents 712453003803778552 Brochure N en None pdf 0 N Trust Architecture: Freescale’s Security Solution for Industrial Control Systems (ICS) 477.8 KB PWRARBYNDBITSTA N 1326753923169722820717 /docs/en/brochure/P1010APPBRF.pdf 2016-10-31 1307048373273729685861 PSP 3 Jun 2, 2011 Brochure カタログ The P1010 and P1014 are on a secure boot platform and offer the value of extensive integration and low power dissipation for a wide variety of applications, including cost-sensitive networking, wireless enterprise access point, network attached storage (NAS), digital video surveillance, multi-service business gateway (e.g., media server, IP/PBX-VOIP). None /docs/en/brochure/P1010APPBRF.pdf English 627221 None Brochure 2022-12-07 /docs/en/brochure/P1010APPBRF.pdf P1010 and P1014 low-power communications processors - Brochures /docs/en/brochure/P1010APPBRF.pdf documents 712453003803778552 Brochure N Y en None t518 pdf 0 N P1010 and P1014 low-power communications processors - Brochures 627.2 KB P1010APPBRF N 1307048373273729685861 サポート情報 3 /docs/en/supporting-information/FSLNISTCAVP.pdf 2016-11-09 1368836090577704535160 PSP 42 Oct 28, 2016 Supporting Information FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. None /docs/en/supporting-information/FSLNISTCAVP.pdf English documents 303546 None 371282830530968666 2022-12-07 N /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf documents 371282830530968666 Supporting Information N en None Y pdf 1.9 N N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 303.5 KB FSLNISTCAVP N 1368836090577704535160 /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf 2012-02-21 1329832951617703551255 PSP 43 Feb 21, 2012 Supporting Information None /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf English documents 4770262 None 371282830530968666 2022-12-07 N /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf Migrating from PowerQUICC<sup>&#174;</sup> II Pro to QorIQ<sup>&#174;</sup>&#8217;s P1010 /docs/en/supporting-information/P1010_Migration_Document_AMS.pdf documents 371282830530968666 Supporting Information N en None Y pdf 1 N N Migrating from PowerQUICC<sup>&#174;</sup> II Pro to QorIQ<sup>&#174;</sup>&#8217;s P1010 4.8 MB P1010_MGRTN_DCM N 1329832951617703551255 /docs/en/supporting-information/P1010_1014PECI.pdf 2016-10-31 1292347735470711488943 PSP 44 Dec 10, 2010 Supporting Information None /docs/en/supporting-information/P1010_1014PECI.pdf English documents 22681 None 371282830530968666 2023-06-19 N /docs/en/supporting-information/P1010_1014PECI.pdf P1010_1014 Family Customer Export Control Information /docs/en/supporting-information/P1010_1014PECI.pdf documents 371282830530968666 Supporting Information N en None Y pdf 0 N N P1010_1014 Family Customer Export Control Information 22.7 KB P1010_1014PECI N 1292347735470711488943 データ・シート 2 /secured/assets/documents/en/data-sheet/P1014EC.pdf 2016-10-31 1328517888659709521438 PSP 4 May 28, 2014 Data Sheet This document provides the hardware specifications for P1010 QorIQ<sup>&#174;</sup> Integrated Processor. Registration without Disclaimer /secured/assets/documents/en/data-sheet/P1014EC.pdf English documents 1720688 None 980000996212993340 2023-06-18 Y /webapp/Download?colCode=P1014EC&lang_cd=ja P1014 QorIQ Integrated Processor Hardware Specifications - Data Sheet /secured/assets/documents/en/data-sheet/P1014EC.pdf documents 980000996212993340 Data Sheet N en Extended pdf 4 Y N P1014 QorIQ Integrated Processor Hardware Specifications - Data Sheet 1.7 MB P1014EC N 1328517888659709521438 /secured/assets/documents/en/data-sheet/P1010EC.pdf 2016-10-31 1328516463336737218992 PSP 5 May 27, 2014 Data Sheet This document provides the hardware specifications for P1010 QorIQ<sup>&#174;</sup> Integrated Processor. Registration without Disclaimer /secured/assets/documents/en/data-sheet/P1010EC.pdf English documents 1778491 None 980000996212993340 2023-06-18 Y /webapp/Download?colCode=P1010EC&lang_cd=ja P1010 QorIQ Integrated Processor Hardware Specifications - Data Sheet /secured/assets/documents/en/data-sheet/P1010EC.pdf documents 980000996212993340 Data Sheet N en Extended pdf 4 Y N P1010 QorIQ Integrated Processor Hardware Specifications - Data Sheet 1.8 MB P1010EC N 1328516463336737218992 ファクト・シート 2 /docs/en/fact-sheet/QP1010FS.pdf 2016-10-31 1288028454167704719065 PSP 1 May 30, 2013 Fact Sheet ファクト・シート An overview of the QorIQ<sup>&#174;</sup> P1010 and P1014 low power communications processors. None /docs/en/fact-sheet/QP1010FS.pdf English 219962 None Fact Sheet 2022-12-07 N /docs/en/fact-sheet/QP1010FS.pdf QorIQ P1010 and P1014 Communications Processors /docs/en/fact-sheet/QP1010FS.pdf documents 736675474163315314 Fact Sheet N Y en None t523 pdf 1 N N QorIQ P1010 and P1014 Communications Processors 220.0 KB QP1010FS N 1288028454167704719065 /docs/en/fact-sheet/P1010RDBFS.pdf 2016-10-31 1304393005972727108304 PSP 2 Sep 11, 2013 Fact Sheet ファクト・シート The P1010 RDB is a highly integrated reference design board aimed at low-cost networking applications (with or without trust architecture), wired and wireless access, as well as industrial and smart energy applications. None /docs/en/fact-sheet/P1010RDBFS.pdf English 353456 None Fact Sheet 2022-12-07 N /docs/en/fact-sheet/P1010RDBFS.pdf QorIQ P1010 RDB - Fact Sheet /docs/en/fact-sheet/P1010RDBFS.pdf documents 736675474163315314 Fact Sheet N Y en None t523 pdf 1 N N QorIQ P1010 RDB - Fact Sheet 353.5 KB P1010RDBFS N 1304393005972727108304 ホワイト・ペーパ 5 /docs/en/white-paper/SPECTREPPCWP.pdf 2020-01-30 1580452712610724357770 PSP 45 Jan 30, 2020 White Paper In this paper, we present the mitigations for Spectre variant 1 and Spectre variant 2 for NXP PowerPC processors. The NXP PowerPC processors are not vulnerable to the Meltdown attack, Spectre variant 1.1/1.2, or Spectre variant 4. None /docs/en/white-paper/SPECTREPPCWP.pdf English documents 317053 None 918633085541740938 2022-12-07 N /docs/en/white-paper/SPECTREPPCWP.pdf Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper /docs/en/white-paper/SPECTREPPCWP.pdf documents 918633085541740938 White Paper N en None Y pdf 0 N N Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper 317.1 KB SPECTREPPCWP N 1580452712610724357770 /docs/en/white-paper/QORIQPMWP.pdf 2017-03-30 1419964678458711207150 PSP 46 Mar 30, 2017 White Paper QORIQPMWP: This document describes how Power Management technologies will play a more important role in controlling or reducing power consumption of electronic systems. None /docs/en/white-paper/QORIQPMWP.pdf English documents 1418055 None 918633085541740938 2023-06-19 N /docs/en/white-paper/QORIQPMWP.pdf QORIQPMWP, QorIQ Power Management - White Paper /docs/en/white-paper/QORIQPMWP.pdf documents 918633085541740938 White Paper N en None pdf 0 N N QORIQPMWP, QorIQ Power Management - White Paper 1.4 MB QORIQPMWP N 1419964678458711207150 /docs/en/white-paper/QORIQSECBOOTWP.pdf 2016-10-31 1317136062337713598350 PSP 47 Jan 25, 2013 White Paper Security continues to be an increasingly important concern in the design of modern systems. Threats against networks and network-connected&#13;&#10;devices are real and growing. With an estimated $40 billion (USD)* of data loss per year, service providers and end-users are becoming painfully&#13;&#10;aware of the consequences of unsecured networks and databases. None /docs/en/white-paper/QORIQSECBOOTWP.pdf English documents 494394 None 918633085541740938 2023-06-19 N /docs/en/white-paper/QORIQSECBOOTWP.pdf Secure Boot - White Paper /docs/en/white-paper/QORIQSECBOOTWP.pdf documents 918633085541740938 White Paper N en None pdf 1 N N Secure Boot - White Paper 494.4 KB QORIQSECBOOTWP N 1317136062337713598350 /docs/en/white-paper/INTFCWP.pdf 2016-10-31 1313524709471728984206 PSP 48 Aug 16, 2011 White Paper The past few years have witnessed explosive&#13;&#10;growth in the flash memory market, driven by&#13;&#10;the use of wireless communication devices,&#13;&#10;networking and communication products,&#13;&#10;security systems and other types of electronic&#13;&#10;equipment (PDAs, digital cameras, MP3 audio&#13;&#10;players). In the next few years, system designs&#13;&#10;will demand even more non-volatile memories,&#13;&#10;either with high density and very high writing&#13;&#10;throughput for data storage a None /docs/en/white-paper/INTFCWP.pdf English documents 673312 None 918633085541740938 2023-06-19 N /docs/en/white-paper/INTFCWP.pdf Integrated Flash Controller /docs/en/white-paper/INTFCWP.pdf documents 918633085541740938 White Paper N en None pdf 0 N N Integrated Flash Controller 673.3 KB INTFCWP N 1313524709471728984206 /secured/assets/documents/en/white-paper/QORIQTAWP.pdf 2016-10-31 1283981132878727112937 PSP 49 May 10, 2011 White Paper This paper discusses the objectives of the trust architecture, how it works, and logistical considerations. Registration without Disclaimer /secured/assets/documents/en/white-paper/QORIQTAWP.pdf English documents 650609 None 918633085541740938 2022-12-07 Y /webapp/Download?colCode=QORIQTAWP&lang_cd=ja An Introduction to the QorIQ Platform's Trust Architecture /secured/assets/documents/en/white-paper/QORIQTAWP.pdf documents 918633085541740938 White Paper N en Extended Y pdf 2 Y N An Introduction to the QorIQ Platform's Trust Architecture 650.6 KB QORIQTAWP N 1283981132878727112937 ユーザ・ガイド 1 /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC 2019-12-18 https://docs.nxp.com/bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html /bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html Y Y 1576719019599707128294 PSP 37 Nov 14, 2019 User Guide None /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC English Y documents Y None 132339537837198660 2022-12-07 N https://docs.nxp.com/bundle/GUID-805CC0EA-4001-47AD-86CD-4F340751F6B7/page/GUID-17B5D04F-6471-4EC6-BEB9-DE4D0AFA034A.html Spectre and Meltdown Updates for Power ISA Cores /docs/en/user-guide/SPECTRE-MELTDOWN-POWER-ISA-DOC documents 132339537837198660 User Guide N en None Y 1 N N Spectre and Meltdown Updates for Power ISA Cores SPECTRE-MELTDOWN-POWER-ISA-DOC N 1576719019599707128294 リファレンス・マニュアル 5 /secured/assets/documents/en/reference-manual/P1010RM.pdf 2016-10-31 1320750813003714349651 PSP 6 Aug 24, 2015 Reference Manual The P1010 is a cost-effective, low-power, highly integrated host processor that addresses the requirements of several routing, gateways, storage, consumer, and industrial applications. Registration without Disclaimer /secured/assets/documents/en/reference-manual/P1010RM.pdf English documents 24415227 None 500633505221135046 2023-06-18 Y /webapp/Download?colCode=P1010RM&lang_cd=ja P1010 QorIQ Integrated Processor Reference Manual /secured/assets/documents/en/reference-manual/P1010RM.pdf documents 500633505221135046 Reference Manual N en Extended pdf 4 Y N P1010 QorIQ Integrated Processor Reference Manual 24.4 MB P1010RM N 1320750813003714349651 /secured/assets/documents/en/reference-manual/P1014RM.pdf 2016-10-31 1320809473633708608046 PSP 7 Aug 24, 2015 Reference Manual The P1014 is a cost-effective, low-power, highly integrated host processor that addresses the requirements of several routing, gateways, storage, consumer, and industrial applications. Registration without Disclaimer /secured/assets/documents/en/reference-manual/P1014RM.pdf English documents 22325715 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=P1014RM&lang_cd=ja P1014 QorIQ Integrated Processor Reference Manual /secured/assets/documents/en/reference-manual/P1014RM.pdf documents 500633505221135046 Reference Manual N en Extended pdf 4 Y N P1014 QorIQ Integrated Processor Reference Manual 22.3 MB P1014RM N 1320809473633708608046 /secured/assets/documents/en/reference-manual/P1010SECRM.pdf 2011-11-08 1320813933437716637352 PSP 8 Nov 2, 2014 Reference Manual SEC 4.4 (Security Engine) is NXP&#8217;s latest cryptographic acceleration and offloading hardware. Registration without Disclaimer /secured/assets/documents/en/reference-manual/P1010SECRM.pdf English documents 5709982 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=P1010SECRM&lang_cd=ja P1010 Security (SEC 4.4) Reference Manual /secured/assets/documents/en/reference-manual/P1010SECRM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 2 Y N P1010 Security (SEC 4.4) Reference Manual 5.7 MB P1010SECRM N 1320813933437716637352 /secured/assets/documents/en/reference-manual/EREF_RM.pdf 2016-10-31 1319210247754725815434 PSP 9 Jun 26, 2014 Reference Manual This reference manual describes the resources defined for the Power ISA embedded environment. Registration without Disclaimer /secured/assets/documents/en/reference-manual/EREF_RM.pdf English documents 10448185 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=EREF_RM&lang_cd=ja EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual /secured/assets/documents/en/reference-manual/EREF_RM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 1 Y N EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual 10.4 MB EREF_RM N 1319210247754725815434 /docs/en/reference-manual/E500CORERM.pdf 2016-10-31 111qmdXB PSP 10 May 11, 2005 Reference Manual The primary objective of this user&#8217;s manual is to describe the functionality of the e500 embedded microprocessor core for software and hardware developers. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words in the 64-bit general-purpose registers (GPRs). None /docs/en/reference-manual/E500CORERM.pdf English documents 5707515 None 500633505221135046 2022-12-07 /docs/en/reference-manual/E500CORERM.pdf PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/E500CORERM.pdf documents 500633505221135046 Reference Manual N en None pdf 1 N PowerPC ™ e500 Core Family - Reference Manual 5.7 MB E500CORERM N 111qmdXB true Y Products

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