Layerscape® LS1012A Processor for the IoT | NXP Semiconductors

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Layerscape® 1012A Low Power Processor

LS1012A アクティブ
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The LS1012A processor, optimized for battery-backed or USB-powered, space-constrained networking and IoT applications, integrates a single Arm® Cortex®-A53 core running up to 1GHz with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance in an ultra-small size envelope at 1W typical power dissipation. The LS1012A incorporates the same Trust Architecture and software compatibility of higher-tier LS family devices, enabling scalable, secure applications that leverage a common 64-bit software platform.

Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.

ブロック図

LS1012A Block Diagram

LS1012A Block Diagram
図を取得する PDF

Features

Core Complex

  • Single 600 MHz or 1GHz Arm® Cortex®-A53 core
  • 32 KB-I and 32 KB-D ECC protected cache
  • 256 KB L2 ECC protected cache
  • Over 4000 Coremarks performance

Networking Elements

  • Three-lane SerDes up to 6 GHz multiplexed across controllers supporting
    • One PCI Express® Gen 2 interface
    • One SATA 3.0 Interface
    • Two 1Gb or 2.5Gb Ethernet Controllers

Accelerators and Memory Controllers

  • Packet Forwarding Engine
  • Integrated security engine (SEC)
  • 16-bit DDR3L Memory Controller
  • QuadSPI Flash Memory Interface

Basic Peripherals and Interconnect

  • 1x USB 3.0 + PHY
  • 1x USB 2.0 + ULPI
  • 1x SPI, 2x I2C
  • 2x SD3.0 / SDIO / eMMC
  • 2x UART
  • 5x I2S

Additional Features

  • QorIQ® Trust Architecture
  • Arm TrustZone
  • 9.6 x 9.6mm L-BGA package

購入/パラメータ

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N true 0 PSPLS1012Aja 27 アプリケーション・ノート Application Note t789 18 エラッタ Errata t522 1 サポート情報 Supporting Information t531 3 データ・シート Data Sheet t520 1 ファクト・シート Fact Sheet t523 1 リファレンス・マニュアル Reference Manual t877 2 製品概要 Product Brief t532 1 ja ja ja データ・シート Data Sheet 1 1 2 English The LS1012A processor features a 64-bit Arm® Cortex®-A53 processor core with ECC-protected L1 and L2 cache memories along with datapath acceleration and network, peripheral interfaces, wireless infrastructure, and general-purpose embedded applications. 1485183553998699260604 PSP 1.6 MB Registration without Disclaimer None documents Extended 1485183553998699260604 /secured/assets/documents/en/data-sheet/LS1012A.pdf 1560234 /secured/assets/documents/en/data-sheet/LS1012A.pdf LS1012A documents Y N 2017-01-23 LS1012A Data Sheet /webapp/Download?colCode=LS1012A&lang_cd=ja /secured/assets/documents/en/data-sheet/LS1012A.pdf Data Sheet N 980000996212993340 2023-06-18 pdf Y en Jan 31, 2019 980000996212993340 Data Sheet Y N LS1012A Data Sheet リファレンス・マニュアル Reference Manual 2 2 3 English LS1012A is targeted at the consumer NAS, IoT gateway, broadband Ethernet gateway, and industrial automation markets, and delivers an unmatched level of features and performance. 1484299845866719314452 PSP 51.4 MB Registration without Disclaimer None documents Extended 1484299845866719314452 /secured/assets/documents/en/reference-manual/LS1012ARM.pdf 51390907 /secured/assets/documents/en/reference-manual/LS1012ARM.pdf LS1012ARM documents Y N 2017-01-13 LS1012A Reference Manual /webapp/Download?colCode=LS1012ARM&lang_cd=ja /secured/assets/documents/en/reference-manual/LS1012ARM.pdf Reference Manual N 500633505221135046 2023-06-18 pdf Y en Oct 1, 2020 500633505221135046 Reference Manual Y N LS1012A Reference Manual 3 1 English SEC is the chip's cryptographic acceleration and offloading hardware. It combines functions previously implemented in separate modules to create a modular and scalable acceleration and assurance engine. 1484298216845712528713 PSP 5.4 MB Registration without Disclaimer None documents Extended 1484298216845712528713 /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf 5355189 /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf LS1012ASECRM documents Y N 2017-01-13 LS1012A Security (SEC) Reference Manual /webapp/Download?colCode=LS1012ASECRM&lang_cd=ja /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf Reference Manual N 500633505221135046 2023-06-18 pdf Y en Jul 27, 2017 500633505221135046 Reference Manual Y N LS1012A Security (SEC) Reference Manual アプリケーション・ノート Application Note 18 4 0 English This application note introduces the LS1xxxx and LS2xxxx devices Thermal Management Unit (TMU). TMU Thermal Measurement Temperature Sensor Heat power 1651046281017726871122 PSP 241.6 KB None None documents None 1651046281017726871122 /docs/en/application-note/AN12310.pdf 241590 /docs/en/application-note/AN12310.pdf AN12310 documents N N 2022-04-27 Thermal Management Unit Usage /docs/en/application-note/AN12310.pdf /docs/en/application-note/AN12310.pdf Application Note N 645036621402383989 2024-12-13 pdf N en Apr 27, 2022 645036621402383989 Application Note Y N Thermal Management Unit Usage 5 1 English AN11950: This application note provides focused, comprehensive guide for low cost DDR interfacing with LS1012A. 1493298346523734146100 PSP 237.6 KB Registration without Disclaimer None documents Extended 1493298346523734146100 /secured/assets/documents/en/application-note/AN11950.pdf 237645 /secured/assets/documents/en/application-note/AN11950.pdf AN11950 documents Y N 2017-04-27 DDR Interfacing for LS1012A Application Note /webapp/Download?colCode=AN11950&lang_cd=ja /secured/assets/documents/en/application-note/AN11950.pdf Application Note N 645036621402383989 2025-01-27 pdf Y en Mar 9, 2021 645036621402383989 Application Note Y N DDR Interfacing for LS1012A Application Note 6 0 Chinese AN5260: This document describes the steps required to configure pre-boot loader (PBL) on NXP QorIQ<sup>&#174;</sup> platform using the PBL tool included in QorIQ Configuration and Validation Suite (QCVS). 1456317293250700197105zh PSP 1.0 MB None None documents None 1456317293250700197105 /docs/zh/application-note/AN5260.pdf 1027928 /docs/zh/application-note/AN5260.pdf AN5260 documents N N 2016-10-31 PBL Configuration using QCVS Application Note /docs/zh/application-note/AN5260.pdf /docs/zh/application-note/AN5260.pdf Application Note N 645036621402383989 2022-12-07 zh Feb 24, 2016 645036621402383989 Application Note Y N PBL Configuration using QCVS Application Note 1 English AN5260: This document describes the steps required to configure pre-boot loader (PBL) on NXP QorIQ platform using the PBL tool included in QorIQ Configuration and Validation Suite (QCVS). 1456317293250700197105 PSP 1.0 MB None None documents None 1456317293250700197105 /docs/en/application-note/AN5260.pdf 1027928 /docs/en/application-note/AN5260.pdf AN5260 documents N N 2016-10-31 PBL Configuration using QCVS Application Note /docs/en/application-note/AN5260.pdf /docs/en/application-note/AN5260.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 30, 2020 645036621402383989 Application Note Y N PBL Configuration using QCVS Application Note 7 0 English This document decsribes how to implement the IEEE standard 1149.6™ on NXP's LS1012A processor. 1598951414910713938169 PSP 291.8 KB Registration without Disclaimer None documents Extended 1598951414910713938169 /secured/assets/documents/en/application-note/AN5388.pdf 291825 /secured/assets/documents/en/application-note/AN5388.pdf AN5388 documents Y N 2020-09-01 AN5388 - Implementation of IEEE Standard 1149.6™ on LS1012A Processor, Application Note /webapp/Download?colCode=AN5388&lang_cd=ja /secured/assets/documents/en/application-note/AN5388.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Sep 1, 2020 645036621402383989 Application Note Y N AN5388 - Implementation of IEEE Standard 1149.6™ on LS1012A Processor, Application Note 8 0 English AN12537: This document describes how to build U-Boot and device tree for booting in Falcon Mode and deploy them on LS1043A Reference Design Board. 1575020878292703636043 PSP 176.2 KB Registration without Disclaimer None documents Extended 1575020878292703636043 /secured/assets/documents/en/application-note/AN12537.pdf 176213 /secured/assets/documents/en/application-note/AN12537.pdf AN12537 documents Y N 2019-11-29 Boot Time Optimization of LS1043ARDB Using U-Boot Falcon Mode Application Note /webapp/Download?colCode=AN12537&lang_cd=ja /secured/assets/documents/en/application-note/AN12537.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Nov 28, 2019 645036621402383989 Application Note Y N Boot Time Optimization of LS1043ARDB Using U-Boot Falcon Mode Application Note 9 2 English This document provides recommendations for new designs based on the LS1012A, which is a LS series processor, consisting of one Arm® v8 64-bit Cortex®-A53 processor. 1489079339040736008509 PSP 692.8 KB Registration without Disclaimer None documents Extended 1489079339040736008509 /secured/assets/documents/en/application-note/AN5192.pdf 692757 /secured/assets/documents/en/application-note/AN5192.pdf AN5192 documents Y N 2017-03-09 AN5192, LS1012A Design Checklist - Application Note /webapp/Download?colCode=AN5192&lang_cd=ja /secured/assets/documents/en/application-note/AN5192.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en May 9, 2019 645036621402383989 Application Note Y N AN5192, LS1012A Design Checklist - Application Note 10 0 English AN12279: This application note is intended for users who want to optimize boot time in their applications when QSPI is selected as the boot source. 1542174029185732481155 PSP 236.9 KB None None documents None 1542174029185732481155 /docs/en/application-note/AN12279.pdf 236865 /docs/en/application-note/AN12279.pdf AN12279 documents N N 2018-11-13 Configure QSPI Bus Width and Frequency in Pre-Boot Loader Stage on LS Series Processors Application Note /docs/en/application-note/AN12279.pdf /docs/en/application-note/AN12279.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 13, 2018 645036621402383989 Application Note Y N Configure QSPI Bus Width and Frequency in Pre-Boot Loader Stage on LS Series Processors Application Note 11 0 English AN12246: This document details the implementation of a use case where PCIe root complex (RC) provides boot images to the LS1046A configured as a PCIe endpoint (EP). 1541147586841720409803 PSP 4.3 MB None None documents None 1541147586841720409803 /docs/en/application-note/AN12246.pdf 4291097 /docs/en/application-note/AN12246.pdf AN12246 documents N N 2018-11-02 Loading Boot Loader on LS1046ARDB through PCIe Application Note /docs/en/application-note/AN12246.pdf /docs/en/application-note/AN12246.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 1, 2018 645036621402383989 Application Note Y N Loading Boot Loader on LS1046ARDB through PCIe Application Note 12 0 English This document is intended for customers using LS1012A processor revision 1.0 based designs and need to migrate their designs to revision 2.0. 1515574065407725801038 PSP 240.7 KB None None documents None 1515574065407725801038 /docs/en/application-note/AN11980.pdf 240687 /docs/en/application-note/AN11980.pdf AN11980 documents N N 2018-01-10 AN11980, LS1012A silicon changes from revision 1.0 to revision 2.0 - Application Note /docs/en/application-note/AN11980.pdf /docs/en/application-note/AN11980.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jan 10, 2018 645036621402383989 Application Note Y N AN11980, LS1012A silicon changes from revision 1.0 to revision 2.0 - Application Note 13 0 English This application note describes how to access a serial NAND and an SPISTACK device (serial NOR + serial NAND) as well as boot from it. 1506408477909683742994 PSP 359.4 KB Registration without Disclaimer None documents Extended 1506408477909683742994 /secured/assets/documents/en/application-note/AN5376.pdf 359433 /secured/assets/documents/en/application-note/AN5376.pdf AN5376 documents Y N 2017-09-25 AN5376, How Does QuadSPI Work with a Serial NAND - Application Note /webapp/Download?colCode=AN5376&lang_cd=ja /secured/assets/documents/en/application-note/AN5376.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Sep 26, 2017 645036621402383989 Application Note Y N AN5376, How Does QuadSPI Work with a Serial NAND - Application Note 14 1 English Solder joint and package temperature for Pb-free BGA in SnPB and Pb-free solders in IR or convection reflow ovens are discussed in this document. 1154542630989715908212 PSP 281.6 KB None None documents None 1154542630989715908212 /docs/en/application-note/AN3300.pdf 281637 /docs/en/application-note/AN3300.pdf AN3300 documents N N 2017-08-17 General soldering Temperature Process Guidelines /docs/en/application-note/AN3300.pdf /docs/en/application-note/AN3300.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Aug 16, 2017 645036621402383989 Application Note Y N General soldering Temperature Process Guidelines 15 0 English AN11951: This application note is intended to provide a cost effective power supply solution for the LS1012A. 1493297556693701725001 PSP 142.6 KB Registration without Disclaimer None documents Extended 1493297556693701725001 /secured/assets/documents/en/application-note/AN11951.pdf 142597 /secured/assets/documents/en/application-note/AN11951.pdf AN11951 documents Y N 2017-04-27 Implementing low cost supply for the LS1012A Application Note /webapp/Download?colCode=AN11951&lang_cd=ja /secured/assets/documents/en/application-note/AN11951.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Apr 26, 2017 645036621402383989 Application Note N Implementing low cost supply for the LS1012A Application Note 16 Rev. 0 English AN5310: This application note explains the 211 FC-LGA package and PCB assembly process. 1488524705973723256933 PSP 3.5 MB Registration without Disclaimer None documents Extended 1488524705973723256933 /secured/assets/documents/en/application-note/AN5310.pdf 3529005 /secured/assets/documents/en/application-note/AN5310.pdf AN5310 documents Y N 2017-03-03 LS1012A, 211 FC-LGA Package and PCB Assembly Process Application Note /webapp/Download?colCode=AN5310&lang_cd=ja /secured/assets/documents/en/application-note/AN5310.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Mar 2, 2017 645036621402383989 Application Note N LS1012A, 211 FC-LGA Package and PCB Assembly Process Application Note 17 0 English One of the important use case of LS1012A is Wi-Fi access point (AP). Wi-Fi radio or Wi-Fi card can either be connected to the PCIe port or one of the two SDIO ports providing wireless connectivity. This application note is focused on the enablement of Wi-Fi card connected to one of the SDIO port of the LS1012ARDB. The Wi-Fi card used for this activity is Murata Wi-Fi™ card with Broadcom chipset. 1487278599214718067213 PSP 510.8 KB None None documents None 1487278599214718067213 /docs/en/application-note/AN5414.pdf 510757 /docs/en/application-note/AN5414.pdf AN5414 documents N N 2017-02-16 Enabling SDIO Wi-Fi on LS1012ARDB - Application Note /docs/en/application-note/AN5414.pdf /docs/en/application-note/AN5414.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Feb 15, 2017 645036621402383989 Application Note N Enabling SDIO Wi-Fi on LS1012ARDB - Application Note 18 6 English AN3940: This document provides general hardware and layout considerations and guidelines for hardware engineers implementing a DDR3 memory subsystem. 1264793052715706871063 PSP 547.7 KB Registration without Disclaimer None documents Extended 1264793052715706871063 /secured/assets/documents/en/application-note/AN3940.pdf 547662 /secured/assets/documents/en/application-note/AN3940.pdf AN3940 documents Y N 2016-10-31 AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note /webapp/Download?colCode=AN3940&lang_cd=ja /secured/assets/documents/en/application-note/AN3940.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Nov 25, 2013 645036621402383989 Application Note Y N AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note 19 Rev. 0 English This application note describes some reference connection schemes when interfacing the third-party clock driver chip&#8217;s output with the SerDes Reference Clock inputs of PowerQUICC<sup>&#174;</sup> or QorIQ<sup>&#174;</sup> devices. It also summarizes some recommendations for PCI Express and SRIO HSSI measurement. 1305312143395731535528 PSP 577.2 KB Registration without Disclaimer None documents Extended 1305312143395731535528 /secured/assets/documents/en/application-note/AN4311.pdf 577164 /secured/assets/documents/en/application-note/AN4311.pdf AN4311 documents Y N 2016-10-31 SerDes Reference Clock Interfacing and HSSI Measurements Recommendations /webapp/Download?colCode=AN4311&lang_cd=ja /secured/assets/documents/en/application-note/AN4311.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en May 13, 2011 645036621402383989 Application Note Y N SerDes Reference Clock Interfacing and HSSI Measurements Recommendations 20 1 English This application note describes how to use and benefit from DDR memory interleaving. 1251150824863717930878 PSP 717.3 KB Registration without Disclaimer None documents Extended 1251150824863717930878 /secured/assets/documents/en/application-note/AN3939.pdf 717276 /secured/assets/documents/en/application-note/AN3939.pdf AN3939 documents Y N 2016-10-31 DDR Interleaving for PowerQUICC and QorIQ Processors /webapp/Download?colCode=AN3939&lang_cd=ja /secured/assets/documents/en/application-note/AN3939.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 30, 2010 645036621402383989 Application Note Y N DDR Interleaving for PowerQUICC and QorIQ Processors 21 0 English This document demonstrates how to determine the package temperature and thermal mass dependent moisture sensitivity level (MSL) of products to ensure reliable processing of moisture sensitive surface mount components. Comply with these recommendations to maintain package integrity of components during any heat exposure of board soldering and de-soldering. 1154542628855726115465 PSP 151.6 KB None None documents None 1154542628855726115465 /docs/en/application-note/AN3298.pdf 151612 /docs/en/application-note/AN3298.pdf AN3298 documents N N 2016-10-31 Solder Joint Temperature and Package Peak Temperature /docs/en/application-note/AN3298.pdf /docs/en/application-note/AN3298.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Aug 2, 2006 645036621402383989 Application Note Y N Solder Joint Temperature and Package Peak Temperature エラッタ Errata 1 22 kb 5 English The current errata for LS1012A is Feb 2023, Rev 6. It is an NDA document. Please see the Sharepoint site https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspxages/Home.aspx (NDA and NXP-issued invite required), or contact your NXP representative. 1645463526109722879600 PSP None None documents None 1645463526109722879600 https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx LS1012-ERRATA-LINK documents N N N 2022-02-21 LS1012 Errata https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx Y Errata N 155452329886410597 Y 2023-05-23 URL en Feb 21, 2022 155452329886410597 Errata Y N https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx LS1012 Errata URL ファクト・シート Fact Sheet 1 23 0 English The LS1012A processor provides intelligent integration and extreme power efficiency in a small 9.6 x 9.6mm package for fanless, small form factor networking and Internet of Things (IoT applications. 1455586535790691699395 PSP 289.8 KB None None documents None 1455586535790691699395 /docs/en/fact-sheet/LS1012AFS.pdf 289834 /docs/en/fact-sheet/LS1012AFS.pdf LS1012AFS documents N N 2016-10-31 LS1012A - Fact Sheet /docs/en/fact-sheet/LS1012AFS.pdf /docs/en/fact-sheet/LS1012AFS.pdf Fact Sheet N 736675474163315314 2022-12-07 pdf N en Feb 15, 2016 736675474163315314 Fact Sheet Y N LS1012A - Fact Sheet 製品概要 Product Brief 1 24 2 English LS1012A integrated processor is targeted at the consumer NAS, IoT gateway, broadband Ethernet gateway, and industrial automation markets. 1464328974013691105832 PSP 250.3 KB Registration without Disclaimer None documents Extended 1464328974013691105832 /secured/assets/documents/en/product-brief/LS1012APB.pdf 250336 /secured/assets/documents/en/product-brief/LS1012APB.pdf LS1012APB documents Y N 2017-03-28 LS1012A Product Brief /webapp/Download?colCode=LS1012APB&lang_cd=ja /secured/assets/documents/en/product-brief/LS1012APB.pdf Product Brief N 899114358132306053 2023-06-18 pdf Y en May 4, 2018 899114358132306053 Product Brief Y N LS1012A Product Brief サポート情報 Supporting Information 3 25 1 English Cloud-computing has created new computing paradigms based on virtualization, massive scale and platform service models. Clouds, while flexible, depend on workloads not being overly sensitive to network latency or bandwidth. For applications where humans are directly involved; such as mobile phones, tablets or personal computers, the delays and bandwidth limitations of cloud computing are not noticeable. For applications requiring real-time millisecond responses like autonomous driving, dealing with massive amounts of data such as real-time video processing, or applications with regulatory requirements on where data is located or processing is performed, relying solely on cloud-based computing will not provide acceptable solutions. 1513380701971706513588 PSP 87.0 KB None None documents None 1513380701971706513588 /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf 86989 /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf AWSGREENGRSSA4FL documents N N 2017-12-15 Computing at the Edge – Executive Summary /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf Supporting Information N 371282830530968666 2022-12-07 pdf N en Dec 15, 2017 371282830530968666 Supporting Information N Computing at the Edge – Executive Summary 26 1.9 English FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. 1368836090577704535160 PSP 303.5 KB None None documents None 1368836090577704535160 /docs/en/supporting-information/FSLNISTCAVP.pdf 303546 /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP documents N N 2016-11-09 FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf /docs/en/supporting-information/FSLNISTCAVP.pdf Supporting Information N 371282830530968666 2022-12-07 pdf N en Oct 28, 2016 371282830530968666 Supporting Information Y N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 27 1 English 1476303913368724545562 PSP 17.6 KB None None documents None 1476303913368724545562 /docs/en/supporting-information/LS1012A_14A-PECI.pdf 17559 /docs/en/supporting-information/LS1012A_14A-PECI.pdf LS1012A_14A-PECI documents N N 2016-11-09 LS1012A_14A Family Customer Export Control Information /docs/en/supporting-information/LS1012A_14A-PECI.pdf /docs/en/supporting-information/LS1012A_14A-PECI.pdf Supporting Information N 371282830530968666 2023-06-19 pdf N en Oct 12, 2016 371282830530968666 Supporting Information Y N LS1012A_14A Family Customer Export Control Information false 0 LS1012A downloads ja true 1 Y PSP Y Y アプリケーション・ノート 18 /docs/en/application-note/AN12310.pdf 2022-04-27 1651046281017726871122 PSP 4 Apr 27, 2022 Application Note This application note introduces the LS1xxxx and LS2xxxx devices Thermal Management Unit (TMU). TMU Thermal Measurement Temperature Sensor Heat power None /docs/en/application-note/AN12310.pdf English documents 241590 None 645036621402383989 2024-12-13 N /docs/en/application-note/AN12310.pdf Thermal Management Unit Usage /docs/en/application-note/AN12310.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Thermal Management Unit Usage 241.6 KB AN12310 N 1651046281017726871122 /secured/assets/documents/en/application-note/AN11950.pdf 2017-04-27 1493298346523734146100 PSP 5 Mar 9, 2021 Application Note AN11950: This application note provides focused, comprehensive guide for low cost DDR interfacing with LS1012A. Registration without Disclaimer /secured/assets/documents/en/application-note/AN11950.pdf English documents 237645 None 645036621402383989 2025-01-27 Y /webapp/Download?colCode=AN11950&lang_cd=ja DDR Interfacing for LS1012A Application Note /secured/assets/documents/en/application-note/AN11950.pdf documents 645036621402383989 Application Note N en Extended Y pdf 1 Y N DDR Interfacing for LS1012A Application Note 237.6 KB AN11950 N 1493298346523734146100 /docs/en/application-note/AN5260.pdf 2016-10-31 1456317293250700197105 PSP 6 Nov 30, 2020 Application Note AN5260: This document describes the steps required to configure pre-boot loader (PBL) on NXP QorIQ platform using the PBL tool included in QorIQ Configuration and Validation Suite (QCVS). None /docs/en/application-note/AN5260.pdf English documents 1027928 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN5260.pdf PBL Configuration using QCVS Application Note /docs/en/application-note/AN5260.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N PBL Configuration using QCVS Application Note 1.0 MB AN5260 N 1456317293250700197105 /secured/assets/documents/en/application-note/AN5388.pdf 2020-09-01 1598951414910713938169 PSP 7 Sep 1, 2020 Application Note This document decsribes how to implement the IEEE standard 1149.6™ on NXP's LS1012A processor. Registration without Disclaimer /secured/assets/documents/en/application-note/AN5388.pdf English documents 291825 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN5388&lang_cd=ja AN5388 - Implementation of IEEE Standard 1149.6™ on LS1012A Processor, Application Note /secured/assets/documents/en/application-note/AN5388.pdf documents 645036621402383989 Application Note N en Extended Y pdf 0 Y N AN5388 - Implementation of IEEE Standard 1149.6™ on LS1012A Processor, Application Note 291.8 KB AN5388 N 1598951414910713938169 /secured/assets/documents/en/application-note/AN12537.pdf 2019-11-29 1575020878292703636043 PSP 8 Nov 28, 2019 Application Note AN12537: This document describes how to build U-Boot and device tree for booting in Falcon Mode and deploy them on LS1043A Reference Design Board. Registration without Disclaimer /secured/assets/documents/en/application-note/AN12537.pdf English documents 176213 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN12537&lang_cd=ja Boot Time Optimization of LS1043ARDB Using U-Boot Falcon Mode Application Note /secured/assets/documents/en/application-note/AN12537.pdf documents 645036621402383989 Application Note N en Extended Y pdf 0 Y N Boot Time Optimization of LS1043ARDB Using U-Boot Falcon Mode Application Note 176.2 KB AN12537 N 1575020878292703636043 /secured/assets/documents/en/application-note/AN5192.pdf 2017-03-09 1489079339040736008509 PSP 9 May 9, 2019 Application Note This document provides recommendations for new designs based on the LS1012A, which is a LS series processor, consisting of one Arm® v8 64-bit Cortex®-A53 processor. Registration without Disclaimer /secured/assets/documents/en/application-note/AN5192.pdf English documents 692757 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN5192&lang_cd=ja AN5192, LS1012A Design Checklist - Application Note /secured/assets/documents/en/application-note/AN5192.pdf documents 645036621402383989 Application Note N en Extended Y pdf 2 Y N AN5192, LS1012A Design Checklist - Application Note 692.8 KB AN5192 N 1489079339040736008509 /docs/en/application-note/AN12279.pdf 2018-11-13 1542174029185732481155 PSP 10 Nov 13, 2018 Application Note AN12279: This application note is intended for users who want to optimize boot time in their applications when QSPI is selected as the boot source. None /docs/en/application-note/AN12279.pdf English documents 236865 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN12279.pdf Configure QSPI Bus Width and Frequency in Pre-Boot Loader Stage on LS Series Processors Application Note /docs/en/application-note/AN12279.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Configure QSPI Bus Width and Frequency in Pre-Boot Loader Stage on LS Series Processors Application Note 236.9 KB AN12279 N 1542174029185732481155 /docs/en/application-note/AN12246.pdf 2018-11-02 1541147586841720409803 PSP 11 Nov 1, 2018 Application Note AN12246: This document details the implementation of a use case where PCIe root complex (RC) provides boot images to the LS1046A configured as a PCIe endpoint (EP). None /docs/en/application-note/AN12246.pdf English documents 4291097 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN12246.pdf Loading Boot Loader on LS1046ARDB through PCIe Application Note /docs/en/application-note/AN12246.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Loading Boot Loader on LS1046ARDB through PCIe Application Note 4.3 MB AN12246 N 1541147586841720409803 /docs/en/application-note/AN11980.pdf 2018-01-10 1515574065407725801038 PSP 12 Jan 10, 2018 Application Note This document is intended for customers using LS1012A processor revision 1.0 based designs and need to migrate their designs to revision 2.0. None /docs/en/application-note/AN11980.pdf English documents 240687 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11980.pdf AN11980, LS1012A silicon changes from revision 1.0 to revision 2.0 - Application Note /docs/en/application-note/AN11980.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN11980, LS1012A silicon changes from revision 1.0 to revision 2.0 - Application Note 240.7 KB AN11980 N 1515574065407725801038 /secured/assets/documents/en/application-note/AN5376.pdf 2017-09-25 1506408477909683742994 PSP 13 Sep 26, 2017 Application Note This application note describes how to access a serial NAND and an SPISTACK device (serial NOR + serial NAND) as well as boot from it. Registration without Disclaimer /secured/assets/documents/en/application-note/AN5376.pdf English documents 359433 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN5376&lang_cd=ja AN5376, How Does QuadSPI Work with a Serial NAND - Application Note /secured/assets/documents/en/application-note/AN5376.pdf documents 645036621402383989 Application Note N en Extended Y pdf 0 Y N AN5376, How Does QuadSPI Work with a Serial NAND - Application Note 359.4 KB AN5376 N 1506408477909683742994 /docs/en/application-note/AN3300.pdf 2017-08-17 1154542630989715908212 PSP 14 Aug 16, 2017 Application Note Solder joint and package temperature for Pb-free BGA in SnPB and Pb-free solders in IR or convection reflow ovens are discussed in this document. None /docs/en/application-note/AN3300.pdf English documents 281637 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3300.pdf General soldering Temperature Process Guidelines /docs/en/application-note/AN3300.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N General soldering Temperature Process Guidelines 281.6 KB AN3300 N 1154542630989715908212 /secured/assets/documents/en/application-note/AN11951.pdf 2017-04-27 1493297556693701725001 PSP 15 Apr 26, 2017 Application Note AN11951: This application note is intended to provide a cost effective power supply solution for the LS1012A. Registration without Disclaimer /secured/assets/documents/en/application-note/AN11951.pdf English documents 142597 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN11951&lang_cd=ja Implementing low cost supply for the LS1012A Application Note /secured/assets/documents/en/application-note/AN11951.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N Implementing low cost supply for the LS1012A Application Note 142.6 KB AN11951 N 1493297556693701725001 /secured/assets/documents/en/application-note/AN5310.pdf 2017-03-03 1488524705973723256933 PSP 16 Mar 2, 2017 Application Note AN5310: This application note explains the 211 FC-LGA package and PCB assembly process. Registration without Disclaimer /secured/assets/documents/en/application-note/AN5310.pdf English documents 3529005 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN5310&lang_cd=ja LS1012A, 211 FC-LGA Package and PCB Assembly Process Application Note /secured/assets/documents/en/application-note/AN5310.pdf documents 645036621402383989 Application Note N en Extended pdf Rev. 0 Y N LS1012A, 211 FC-LGA Package and PCB Assembly Process Application Note 3.5 MB AN5310 N 1488524705973723256933 /docs/en/application-note/AN5414.pdf 2017-02-16 1487278599214718067213 PSP 17 Feb 15, 2017 Application Note One of the important use case of LS1012A is Wi-Fi access point (AP). Wi-Fi radio or Wi-Fi card can either be connected to the PCIe port or one of the two SDIO ports providing wireless connectivity. This application note is focused on the enablement of Wi-Fi card connected to one of the SDIO port of the LS1012ARDB. The Wi-Fi card used for this activity is Murata Wi-Fi™ card with Broadcom chipset. None /docs/en/application-note/AN5414.pdf English documents 510757 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN5414.pdf Enabling SDIO Wi-Fi on LS1012ARDB - Application Note /docs/en/application-note/AN5414.pdf documents 645036621402383989 Application Note N en None pdf 0 N N Enabling SDIO Wi-Fi on LS1012ARDB - Application Note 510.8 KB AN5414 N 1487278599214718067213 /secured/assets/documents/en/application-note/AN3940.pdf 2016-10-31 1264793052715706871063 PSP 18 Nov 25, 2013 Application Note AN3940: This document provides general hardware and layout considerations and guidelines for hardware engineers implementing a DDR3 memory subsystem. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3940.pdf English documents 547662 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN3940&lang_cd=ja AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note /secured/assets/documents/en/application-note/AN3940.pdf documents 645036621402383989 Application Note N en Extended Y pdf 6 Y N AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note 547.7 KB AN3940 N 1264793052715706871063 /secured/assets/documents/en/application-note/AN4311.pdf 2016-10-31 1305312143395731535528 PSP 19 May 13, 2011 Application Note This application note describes some reference connection schemes when interfacing the third-party clock driver chip&#8217;s output with the SerDes Reference Clock inputs of PowerQUICC<sup>&#174;</sup> or QorIQ<sup>&#174;</sup> devices. It also summarizes some recommendations for PCI Express and SRIO HSSI measurement. Registration without Disclaimer /secured/assets/documents/en/application-note/AN4311.pdf English documents 577164 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN4311&lang_cd=ja SerDes Reference Clock Interfacing and HSSI Measurements Recommendations /secured/assets/documents/en/application-note/AN4311.pdf documents 645036621402383989 Application Note N en Extended Y pdf Rev. 0 Y N SerDes Reference Clock Interfacing and HSSI Measurements Recommendations 577.2 KB AN4311 N 1305312143395731535528 /secured/assets/documents/en/application-note/AN3939.pdf 2016-10-31 1251150824863717930878 PSP 20 Jun 30, 2010 Application Note This application note describes how to use and benefit from DDR memory interleaving. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3939.pdf English documents 717276 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3939&lang_cd=ja DDR Interleaving for PowerQUICC and QorIQ Processors /secured/assets/documents/en/application-note/AN3939.pdf documents 645036621402383989 Application Note N en Extended Y pdf 1 Y N DDR Interleaving for PowerQUICC and QorIQ Processors 717.3 KB AN3939 N 1251150824863717930878 /docs/en/application-note/AN3298.pdf 2016-10-31 1154542628855726115465 PSP 21 Aug 2, 2006 Application Note This document demonstrates how to determine the package temperature and thermal mass dependent moisture sensitivity level (MSL) of products to ensure reliable processing of moisture sensitive surface mount components. Comply with these recommendations to maintain package integrity of components during any heat exposure of board soldering and de-soldering. None /docs/en/application-note/AN3298.pdf English documents 151612 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3298.pdf Solder Joint Temperature and Package Peak Temperature /docs/en/application-note/AN3298.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N Solder Joint Temperature and Package Peak Temperature 151.6 KB AN3298 N 1154542628855726115465 エラッタ 1 https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx 2022-02-21 1645463526109722879600 PSP 22 Feb 21, 2022 Errata The current errata for LS1012A is Feb 2023, Rev 6. It is an NDA document. Please see the Sharepoint site https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspxages/Home.aspx (NDA and NXP-issued invite required), or contact your NXP representative. URL None https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx English documents kb None 155452329886410597 2023-05-23 N https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx LS1012 Errata https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx documents 155452329886410597 Errata N en None Y Y N URL 5 N LS1012 Errata Y LS1012-ERRATA-LINK N https://nxp1.sharepoint.com/teams/cext128/SitePages/Home.aspx 1645463526109722879600 サポート情報 3 /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf 2017-12-15 1513380701971706513588 PSP 25 Dec 15, 2017 Supporting Information Cloud-computing has created new computing paradigms based on virtualization, massive scale and platform service models. Clouds, while flexible, depend on workloads not being overly sensitive to network latency or bandwidth. For applications where humans are directly involved; such as mobile phones, tablets or personal computers, the delays and bandwidth limitations of cloud computing are not noticeable. For applications requiring real-time millisecond responses like autonomous driving, dealing with massive amounts of data such as real-time video processing, or applications with regulatory requirements on where data is located or processing is performed, relying solely on cloud-based computing will not provide acceptable solutions. None /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf English documents 86989 None 371282830530968666 2022-12-07 N /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf Computing at the Edge – Executive Summary /docs/en/supporting-information/AWSGREENGRSSA4FL.pdf documents 371282830530968666 Supporting Information N en None pdf 1 N N Computing at the Edge – Executive Summary 87.0 KB AWSGREENGRSSA4FL N 1513380701971706513588 /docs/en/supporting-information/FSLNISTCAVP.pdf 2016-11-09 1368836090577704535160 PSP 26 Oct 28, 2016 Supporting Information FSLNISTCAVP: NXP<sup>&#174;</sup> Semiconductors has performed NIST CAVP testing of cryptographic accelerators (called Execution Units or EUs) found in multiple product families, including the PowerQUICC<sup>&#174;</sup> and QorIQ<sup>&#174;</sup> embedded communications processors, and the StarCore<sup>&#174;</sup> digital signal processors. None /docs/en/supporting-information/FSLNISTCAVP.pdf English documents 303546 None 371282830530968666 2022-12-07 N /docs/en/supporting-information/FSLNISTCAVP.pdf FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper /docs/en/supporting-information/FSLNISTCAVP.pdf documents 371282830530968666 Supporting Information N en None Y pdf 1.9 N N FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP<sup>®</sup> Cryptographic Accelerators - White Paper 303.5 KB FSLNISTCAVP N 1368836090577704535160 /docs/en/supporting-information/LS1012A_14A-PECI.pdf 2016-11-09 1476303913368724545562 PSP 27 Oct 12, 2016 Supporting Information None /docs/en/supporting-information/LS1012A_14A-PECI.pdf English documents 17559 None 371282830530968666 2023-06-19 N /docs/en/supporting-information/LS1012A_14A-PECI.pdf LS1012A_14A Family Customer Export Control Information /docs/en/supporting-information/LS1012A_14A-PECI.pdf documents 371282830530968666 Supporting Information N en None Y pdf 1 N N LS1012A_14A Family Customer Export Control Information 17.6 KB LS1012A_14A-PECI N 1476303913368724545562 データ・シート 1 /secured/assets/documents/en/data-sheet/LS1012A.pdf 2017-01-23 1485183553998699260604 PSP 1 Jan 31, 2019 Data Sheet The LS1012A processor features a 64-bit Arm® Cortex®-A53 processor core with ECC-protected L1 and L2 cache memories along with datapath acceleration and network, peripheral interfaces, wireless infrastructure, and general-purpose embedded applications. Registration without Disclaimer /secured/assets/documents/en/data-sheet/LS1012A.pdf English documents 1560234 None 980000996212993340 2023-06-18 Y /webapp/Download?colCode=LS1012A&lang_cd=ja LS1012A Data Sheet /secured/assets/documents/en/data-sheet/LS1012A.pdf documents 980000996212993340 Data Sheet N en Extended Y pdf 2 Y N LS1012A Data Sheet 1.6 MB LS1012A N 1485183553998699260604 ファクト・シート 1 /docs/en/fact-sheet/LS1012AFS.pdf 2016-10-31 1455586535790691699395 PSP 23 Feb 15, 2016 Fact Sheet The LS1012A processor provides intelligent integration and extreme power efficiency in a small 9.6 x 9.6mm package for fanless, small form factor networking and Internet of Things (IoT applications. None /docs/en/fact-sheet/LS1012AFS.pdf English documents 289834 None 736675474163315314 2022-12-07 N /docs/en/fact-sheet/LS1012AFS.pdf LS1012A - Fact Sheet /docs/en/fact-sheet/LS1012AFS.pdf documents 736675474163315314 Fact Sheet N en None Y pdf 0 N N LS1012A - Fact Sheet 289.8 KB LS1012AFS N 1455586535790691699395 リファレンス・マニュアル 2 /secured/assets/documents/en/reference-manual/LS1012ARM.pdf 2017-01-13 1484299845866719314452 PSP 2 Oct 1, 2020 Reference Manual LS1012A is targeted at the consumer NAS, IoT gateway, broadband Ethernet gateway, and industrial automation markets, and delivers an unmatched level of features and performance. Registration without Disclaimer /secured/assets/documents/en/reference-manual/LS1012ARM.pdf English documents 51390907 None 500633505221135046 2023-06-18 Y /webapp/Download?colCode=LS1012ARM&lang_cd=ja LS1012A Reference Manual /secured/assets/documents/en/reference-manual/LS1012ARM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 3 Y N LS1012A Reference Manual 51.4 MB LS1012ARM N 1484299845866719314452 /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf 2017-01-13 1484298216845712528713 PSP 3 Jul 27, 2017 Reference Manual SEC is the chip's cryptographic acceleration and offloading hardware. It combines functions previously implemented in separate modules to create a modular and scalable acceleration and assurance engine. Registration without Disclaimer /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf English documents 5355189 None 500633505221135046 2023-06-18 Y /webapp/Download?colCode=LS1012ASECRM&lang_cd=ja LS1012A Security (SEC) Reference Manual /secured/assets/documents/en/reference-manual/LS1012ASECRM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 1 Y N LS1012A Security (SEC) Reference Manual 5.4 MB LS1012ASECRM N 1484298216845712528713 製品概要 1 /secured/assets/documents/en/product-brief/LS1012APB.pdf 2017-03-28 1464328974013691105832 PSP 24 May 4, 2018 Product Brief LS1012A integrated processor is targeted at the consumer NAS, IoT gateway, broadband Ethernet gateway, and industrial automation markets. Registration without Disclaimer /secured/assets/documents/en/product-brief/LS1012APB.pdf English documents 250336 None 899114358132306053 2023-06-18 Y /webapp/Download?colCode=LS1012APB&lang_cd=ja LS1012A Product Brief /secured/assets/documents/en/product-brief/LS1012APB.pdf documents 899114358132306053 Product Brief N en Extended Y pdf 2 Y N LS1012A Product Brief 250.3 KB LS1012APB N 1464328974013691105832 true Y Products

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