MCX L14x and L25x Ultra-low-power MCUs with Dedicated Sense Domain and Adaptive Dynamic Voltage Control

画像にカーソルを合わせると拡大表示されます。

ブロック図

図を選択する。:

MCX L25x

MCX-L14X-L25X

MCX L14x

MCX-L14X

MCX L25x Superset Features

Core Platform

  • Arm® Cortex®-M33 up to 96 MHz

Memory

  • Up to 512 kB on-chip flash program memory with flash accelerator, 4 kB low-power cache and ECC (support one bit correction and two-bits detection)
  • Flash minimum programming size is 16 bytes
    • Support Flash Swap with 8 kB granularity Up to 128 kB RAM, configurable as up to 8 kB with ECC (support single bit correction two-bits detection)
  • All RAM can be retained down to deep power down mode

Peripherals

  • Analog
    • One single-ended 16-bit ADC with sample rate of 2.0 Msamples/sec in 16-bit mode, support 12-bit mode with increased bandwidth at 3.5 MSamples/sec
    • Up to 24 ADC Input channels with multiple internal and external trigger inputs
    • Integrated temperature sensor
    • A second 12-bit ADC of 2.0 Msamples/sec is functional down to Deep Power Down mode
    • Two High-speed Comparators with 8 input pins and an 8-bit DAC as internal reference, one comparator is functional down to Deep Power Down mode, can be used as a wake-up source from low-power modes
  • Timers
    • Three 32-bit standard general-purpose asynchronous timers/counters, each timer supports up to four capture inputs and four compare outputs; specific timer events can be selected to generate DMA requests
    • Up to 2x QTimer (Quad Timer) cascadable with capture and compare capabilities (can be used for quadrature position encoder) is functional down to Deep Power Down mode
    • LPTimer (Low Power Timer)
    • Frequency measurement timer
    • Windowed Watchdog Timer
    • Wake timer
    • MicroTick timer that runs from the 1MHz clock. This can wake up the device from reduced power modes up to deep-sleep with flash off, with extremely low power consumption
    • 42-bit free running OS timer as a continuous timebase for the system, available in any reduced power mode
  • Communication Interfaces
    • 2x LPSPI (Low Power SPI) modules, supporting up to 50 MHz operation frequency in master mode
    • Up to 2x LPI2C (Low Power I2C) supporting Standard, Fast, Fast+ and Ultra-Fast modes. 1 additional LPI2C is functional down to Deep Power Down mode
    • Up to 3x LPUART (Low Power UART), provides asynchronous, serial communication capabilities. One additional LPUART is functional down to Deep Power Down mode
  • Human Machine Interfaces [MCX L25x]
    • 1x Segment LCD with 48 LCD pins with programmable LCD frame frequency and blink mode is functional down to Deep Power Down mode
    • 1x Keypad supporting up to 8x8 pad matrix is functional down to Deep Power Down mode

MCUXpresso Developer Experience

Security

  • Glitch attack resistant keyed access (Glikey)
  • MBC controls the Read, Write and Execute permission of each flash block, and the configuration can be locked
  • 128-bit unique device serial number for identification (UUID)
  • Code Watchdog for detecting code flow integrity
  • 3 Levels Read Out Protection, allows the user to enable different levels of protection in the system for different Lifecycles
  • Flash programming through in-system programming (ISP) commands over LPUA+B28RT interface with auto baud

Packaging

  • Packaging

ドキュメント

クイック・リファレンス ドキュメンテーションの種類.

1 ドキュメント

サポート

お困りのことは何ですか??