Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
購入オプション
PCF8564AU/10AB/1,0
アクティブ
12NC: 935289478005
詳細
注文
PCF8564AU/5BB/1,01
アクティブ
12NC: 935289319015
詳細
注文
操作機能
| パラメータ | 値 |
|---|---|
RTC Type | IC |
Accuracy (Typ) (+/- ppm) | 20 at 25°C |
Supply Voltage [Min to Max] (V) | 1.8 to 5.5 |
Low Supply Current (μA) | 0.25 |
Communication protocol | I²C |
Capacitive Load (μF) | 7 |
Battery Back Up | No |
Watchdog timer | Y |
| パラメータ | 値 |
|---|---|
Programmable alarm | Y |
Countdown Timer | Y |
Tamper Input | 0 |
Interrupt Output | 1 |
Integrated Temperature Compensation | N |
AEC-Q100 compliant | N |
Operating Temperature (Min-Max) (℃) | -40 to 85 |
環境
| Part/12NC | 鉛フリー | EU RoHS | ハロゲンフリー | RHFインジケーター | REACH SVHC | Weight (mg) |
|---|---|---|---|---|---|---|
PCF8564AU/10AB/1,0(935289478005) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 1.11 |
PCF8564AU/5BB/1,01(935289319015) | Yes | Yes Certificate Of Analysis (CoA) | Yes | | REACH SVHC | 1.554 |
品質
| Part/12NC | 安全保障機能安全 | フィット | MTBF |
|---|---|---|---|
PCF8564AU/10AB/1,0 (935289478005) | No | 5 | 2.0E8 |
PCF8564AU/5BB/1,01 (935289319015) | No | 5 | 2.0E8 |
配送
| Part/12NC | 関税分類番号（米国)免責事項: |
|---|---|
PCF8564AU/10AB/1,0 (935289478005) | 854239 |
PCF8564AU/5BB/1,01 (935289319015) | 854239 |
製造終了品・代替品データ
| Part/12NC | 製造終了のお知らせ | 交換 |
|---|---|---|
PCF8564AU/10AB/1,0 (935289478005) | - | None |
PCF8564AU/5BB/1,01 (935289319015) | - | None |
製品変更のお知らせ
| Part/12NC | 発行日 | 有効期限 | PCN | タイトル |
|---|---|---|---|---|
PCF8564AU/10AB/1,0 (935289478005) | 2019-03-08 | 2019-06-06 | 201901022F01 | PCF8564AU Wafer Test Transfer from ATKH to ATBK |
PCF8564AU/5BB/1,01 (935289319015) |
詳細 PCF8564A
The PCF8564A is a CMOS real-time clock and calendar optimized for low power consumption. A programmable clock output, interrupt output and voltage low detector are also provided. All addresses and data are transferred serially via a two-line bidirectional I²C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte.