PowerQUICC® III Processor with TDM, DDR, PCI, PCIx Express®, RapidIO, 1 GB Ethernet, Security, CPM with UTOPIA | NXP Semiconductors

PowerQUICC® III Processor with TDM, DDR, PCI, PCIx Express®, RapidIO, 1 GB Ethernet, Security, CPM with UTOPIA

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Freescale PowerQUICC MPC8560 Communications Processor Block Diagram

PowerQUICC<sup>&#174;</sup> MPC8560 Communications Processor Block Diagram

Features

  • 32-bit, dual-issue, superscalar, seven-stage pipeline
  • 1850 MIPS at 800 MHz (est. Dhrystone 2.1)
  • 32 KB L1 data and 32 KB L1 instruction cache with line locking support
  • 256 KB on-chip L2 cache with direct mapped capability
  • Enhanced hardware and software debug support
  • Memory management unit (MMU)
  • SIMD extension with single precision floating point
  • High-performance RISC CPM available at up to 333 MHz
    • CPM software compatibility with previous families
    • Greater than 1 Gbps aggregate CPM bandwidth
    • 32 KB of dual-port RAM
    • 128 KB of ROM + 32 KB of RAM for protocol microcode storage
    • Two UTOPIA Level II leader/follower ports with multi-PHY support (one can be 16-bit)
    • Three MII interfaces
    • Eight TDM interfaces (T1/E1), two TDM ports that can be interfaced with T3/E3
    • Four SCCs supporting HDLC and SDLC, HDLC bus, UART, Transparent, BISYNC
    • Three FCCs supporting:
      • Up to 155 Mbps ATM SAR-AAL0, AAL1, AAL2, AAL3/4, AAL5
      • 10/100 Mbps Ethernet (up to three) IEEE® 802.3X
      • 45 Mbps HDLC/transparent (up to three)
    • Two MCCs each supporting 128 full-duplex, 64 kbps, HDLC lines for a total of 256 channels
    • ATM transmission convergence layer capabilities (8 channels)
    • Integrated inverse multiplexing for ATM (IMA) functionality
  • Two triple-speed Ethernet controllers (TSECs) supporting 10/100/1000 Mbps Ethernet (IEEE 802.3, 802.3u, 802.3x, 802.3z, and 802.3ac compliant) with two GMII/TBI/RGMII interfaces
  • 166 MHz, 64-bit, 2.5V I/O, DDR SDRAM memory controller with full ECC support
  • 500 MHz, 8-bit, LVDS I/O, RapidIO controller
  • 133 MHz, 64-bit, 3.3V I/O, PCI-X 1.0a/PCI 2.2 bus controller
  • 166 MHz, 32-bit, 3.3V I/O, local bus with memory controller
  • Integrated four-channel DMA controller
  • Interrupt controller
  • IEEE 1149.1 JTAG test access port
  • 1.2V core power supply with 3.3V and 2.5V I/O
  • 783-pin FC-BGA package
  • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch
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    N true 0 PSPMPC8560ja 68 アプリケーション・ノート Application Note t789 42 アプリケーション・ノート・ソフトウェア Application Note Software t783 8 エンジニアリング・ブリテン Technical Notes t521 1 データ・シート Data Sheet t520 1 パッケージ情報 Package Information t790 1 ファクト・シート Fact Sheet t523 1 ホワイト・ペーパ White Paper t530 4 ユーザ・ガイド User Guide t792 1 リファレンス・マニュアル Reference Manual t877 7 製品概要 Product Brief t532 2 ja 4 1 9 English This fact sheet describes the MPC8560 PowerQUICC<sup>&#174;</sup> integrated communications processor S1026319613038 PSP 212.2 KB None None documents None S1026319613038 /docs/en/fact-sheet/MPC8560FACT.pdf 212155 /docs/en/fact-sheet/MPC8560FACT.pdf MPC8560FACT N N 2016-10-31 MPC8560 Fact Sheet /docs/en/fact-sheet/MPC8560FACT.pdf /docs/en/fact-sheet/MPC8560FACT.pdf Fact Sheet N Y 736675474163315314 2022-12-07 pdf N en Jun 15, 2007 Fact Sheet t523 ファクト・シート Fact Sheet Y N MPC8560 Fact Sheet 2 4.2 English The MPC8560 integrates a PowerPC&#8482; processor core built on Power Architecture&#8482; technology with system logic required for networking, telecommunications, and wireless infrastructure applications. The MPC8560 is a member of the PowerQUICC<sup>&#174;</sup>&#8482; III family of devices that combine system-level support for industry-standard interfaces with processors that implement the embedded category of the Power Architecture technology. 1102695316956752406135 PSP 1.3 MB None None documents None 1102695316956752406135 /docs/en/data-sheet/MPC8560EC.pdf 1268044 /docs/en/data-sheet/MPC8560EC.pdf MPC8560EC N 2004-12-10 MPC8560 Data Sheet /docs/en/data-sheet/MPC8560EC.pdf /docs/en/data-sheet/MPC8560EC.pdf Data Sheet N Y 980000996212993340 2022-12-07 pdf en Jan 28, 2008 Data Sheet t520 データ・シート Data Sheet Y N MPC8560 Data Sheet 3 1 English MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual 1069435329313720198891 PSP 12.6 MB None None documents None 1069435329313720198891 /docs/en/reference-manual/MPC8560RM.pdf 12587591 /docs/en/reference-manual/MPC8560RM.pdf MPC8560RM N 2003-11-21 MPC8560 Reference Manual /docs/en/reference-manual/MPC8560RM.pdf /docs/en/reference-manual/MPC8560RM.pdf Reference Manual N Y 500633505221135046 2022-12-07 pdf en Sep 8, 2004 Reference Manual t877 リファレンス・マニュアル Reference Manual Y N MPC8560 Reference Manual 4 0 English Product Brief 1070483571680732818796 PSP 602.6 KB None None documents None 1070483571680732818796 /docs/en/product-brief/MPC8560PB.pdf 602627 /docs/en/product-brief/MPC8560PB.pdf MPC8560PB N 2003-12-03 MPC8560 Product Brief /docs/en/product-brief/MPC8560PB.pdf /docs/en/product-brief/MPC8560PB.pdf Product Brief N Y 899114358132306053 2022-12-07 pdf en Dec 3, 2003 Product Brief t532 製品概要 Product Brief Y N MPC8560 Product Brief false ja ja リファレンス・マニュアル Reference Manual 6 5 1 English This reference manual describes the resources defined for the Power ISA embedded environment. 1319210247754725815434 PSP 10.4 MB Registration without Disclaimer None documents Extended 1319210247754725815434 /secured/assets/documents/en/reference-manual/EREF_RM.pdf 10448185 /secured/assets/documents/en/reference-manual/EREF_RM.pdf EREF_RM documents Y N 2016-10-31 EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual /webapp/Download?colCode=EREF_RM&lang_cd=ja /secured/assets/documents/en/reference-manual/EREF_RM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Jun 26, 2014 500633505221135046 Reference Manual Y N EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual 6 1.2 English E500CORER: This errata document describes corrections to the PowerPC &#8482; e500 Core Family Reference Manual, Revision 1. 1152820363245707387417 PSP 117.9 KB None None documents None 1152820363245707387417 /docs/en/reference-manual/e500CORERMAD.pdf 117856 /docs/en/reference-manual/e500CORERMAD.pdf E500CORERMAD documents N N 2016-10-31 E500CORER, Errata to PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/e500CORERMAD.pdf /docs/en/reference-manual/e500CORERMAD.pdf Reference Manual N 500633505221135046 2022-12-07 pdf N en Sep 11, 2012 500633505221135046 Reference Manual N E500CORER, Errata to PowerPC ™ e500 Core Family - Reference Manual 7 1.4 English This errata describes corrections to the MPC8560 reference manual, Rev. 1. 1087920435080705525169 PSP 527.2 KB None None documents None 1087920435080705525169 /docs/en/reference-manual/MPC8560RMAD.pdf 527229 /docs/en/reference-manual/MPC8560RMAD.pdf MPC8560RMAD documents N 2004-06-22 Errata to the MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual, Rev. 1 /docs/en/reference-manual/MPC8560RMAD.pdf /docs/en/reference-manual/MPC8560RMAD.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Feb 10, 2010 500633505221135046 Reference Manual N N Errata to the MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual, Rev. 1 8 1 English The primary objective of this user&#8217;s manual is to describe the functionality of the e500 embedded microprocessor core for software and hardware developers. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words in the 64-bit general-purpose registers (GPRs). 111qmdXB PSP 5.7 MB None None documents None 111qmdXB /docs/en/reference-manual/E500CORERM.pdf 5707515 /docs/en/reference-manual/E500CORERM.pdf E500CORERM documents N 2016-10-31 PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/E500CORERM.pdf /docs/en/reference-manual/E500CORERM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en May 11, 2005 500633505221135046 Reference Manual N PowerPC ™ e500 Core Family - Reference Manual 9 0 English Programming Interface Manual for the Signal Processing Engine Auxiliary Processing Unit 1091558271259713861292 PSP 2.7 MB Registration without Disclaimer None documents Extended 1091558271259713861292 /secured/assets/documents/en/reference-manual/SPEPIM.pdf 2733347 /secured/assets/documents/en/reference-manual/SPEPIM.pdf SPEPIM documents Y N 2016-10-31 Signal Processing Engine Auxiliary Processing Unit Programming Interface Manual /webapp/Download?colCode=SPEPIM&lang_cd=ja /secured/assets/documents/en/reference-manual/SPEPIM.pdf Reference Manual N 500633505221135046 2022-12-07 pdf Y en Aug 3, 2004 500633505221135046 Reference Manual Y N Signal Processing Engine Auxiliary Processing Unit Programming Interface Manual 10 1.0 English e500 application binary interface user's guide 111qmW79 PSP 5.8 MB None None documents None 111qmW79 /docs/en/reference-manual/E500ABIUG.pdf 5780945 /docs/en/reference-manual/E500ABIUG.pdf E500ABIUG documents N 2003-03-24 PowerPC e500 Application Binary Interface User's Guide /docs/en/reference-manual/E500ABIUG.pdf /docs/en/reference-manual/E500ABIUG.pdf Reference Manual N 500633505221135046 2022-12-07 pdf en Mar 24, 2003 500633505221135046 Reference Manual Y N PowerPC e500 Application Binary Interface User's Guide アプリケーション・ノート Application Note 42 11 0 Chinese Reviewing the troubleshoot microcontroller when there is a malfunction module. 1641302649210707506203zh PSP 303.0 KB None None documents None 1641302649210707506203 /docs/zh/application-note/AN13461.pdf 302971 /docs/zh/application-note/AN13461.pdf AN13461 documents N N 2022-01-04 AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/zh/application-note/AN13461.pdf /docs/zh/application-note/AN13461.pdf Application Note N 645036621402383989 2022-12-07 zh May 9, 2022 645036621402383989 Application Note Y N 恩智浦微控制器故障排除清单 0 English Reviewing the troubleshoot microcontroller when there is a malfunction module. 1641302649210707506203 PSP 303.0 KB None None documents None 1641302649210707506203 /docs/en/application-note/AN13461.pdf 302971 /docs/en/application-note/AN13461.pdf AN13461 documents N N 2022-01-04 AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/en/application-note/AN13461.pdf /docs/en/application-note/AN13461.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Nov 30, 2021 645036621402383989 Application Note Y N AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note 12 2 English Using the Core and System Performance Monitors 1493403864930712885479 PSP 278.3 KB Registration without Disclaimer None documents Extended 1493403864930712885479 /secured/assets/documents/en/application-note/AN3636.pdf 278345 /secured/assets/documents/en/application-note/AN3636.pdf AN3636 documents Y N 2017-04-28 PowerQUICC III Performance Monitors /webapp/Download?colCode=AN3636&lang_cd=ja /secured/assets/documents/en/application-note/AN3636.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Apr 28, 2017 645036621402383989 Application Note Y N PowerQUICC III Performance Monitors 13 3 English This document is a supplement to the SEC 2/3x reference device driver. 1224778148188710027580 PSP 1.1 MB Registration without Disclaimer None documents Extended 1224778148188710027580 /secured/assets/documents/en/application-note/AN3645.pdf 1147132 /secured/assets/documents/en/application-note/AN3645.pdf AN3645 documents Y N 2016-10-31 SEC 2/3x Descriptor Programmer’s Guide /webapp/Download?colCode=AN3645&lang_cd=ja /secured/assets/documents/en/application-note/AN3645.pdf Application Note N 645036621402383989 2023-06-18 pdf Y en Apr 28, 2017 645036621402383989 Application Note N SEC 2/3x Descriptor Programmer’s Guide 14 11 English AN2583: This application note provides programming guidelines for the PowerQUICC<sup>&#174;</sup> DDR-SDRAM memory controller and specifically JEDEC-compatible DDR1 SDRAM memories. 1070297961506735248621 PSP 333.2 KB None None documents None 1070297961506735248621 /docs/en/application-note/AN2583.pdf 333170 /docs/en/application-note/AN2583.pdf AN2583 documents N N 2003-12-01 AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note /docs/en/application-note/AN2583.pdf /docs/en/application-note/AN2583.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Jul 29, 2014 645036621402383989 Application Note Y N AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note 15 2 English This document describes the requirements and step-by-step procedures for forcing the DRAM into self-refresh mode. 1363012931515701443659 PSP 269.4 KB None None documents None 1363012931515701443659 /docs/en/application-note/AN4531.pdf 269380 /docs/en/application-note/AN4531.pdf AN4531 documents N N 2016-10-31 AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes /docs/en/application-note/AN4531.pdf /docs/en/application-note/AN4531.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Dec 16, 2013 645036621402383989 Application Note N AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes 16 1 English This application note describes how to use and benefit from DDR memory interleaving. 1251150824863717930878 PSP 717.3 KB Registration without Disclaimer None documents Extended 1251150824863717930878 /secured/assets/documents/en/application-note/AN3939.pdf 717276 /secured/assets/documents/en/application-note/AN3939.pdf AN3939 documents Y N 2016-10-31 DDR Interleaving for PowerQUICC and QorIQ Processors /webapp/Download?colCode=AN3939&lang_cd=ja /secured/assets/documents/en/application-note/AN3939.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 30, 2010 645036621402383989 Application Note Y N DDR Interleaving for PowerQUICC and QorIQ Processors 17 1 English This document provides recommendations for designs based on the MPC8540 and the MPC8560 devices. 1091469965314713077158 PSP 582.0 KB None None documents None 1091469965314713077158 /docs/en/application-note/AN2752.pdf 581988 /docs/en/application-note/AN2752.pdf AN2752 documents N 2004-08-02 PowerQUICC<sup>&#174;</sup> III Bring-Up Guideline /docs/en/application-note/AN2752.pdf /docs/en/application-note/AN2752.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jun 29, 2010 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup> III Bring-Up Guideline 18 1 English This application note explains the contents of the leader device tree in a multicore Hypervisor implementation used to allocate system resources to the individual partitions.&#13;&#10;Additionally, it describes the contents of the individual device trees that each partition uses for local allocation of those resources. 1225213465876727613770 PSP 828.9 KB None None documents None 1225213465876727613770 /docs/en/application-note/AN3649.pdf 828938 /docs/en/application-note/AN3649.pdf AN3649 documents N N 2016-10-31 Understanding Device Tree Files in Multicore Hypervisor/LWE Implementations /docs/en/application-note/AN3649.pdf /docs/en/application-note/AN3649.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Apr 19, 2010 645036621402383989 Application Note Y N Understanding Device Tree Files in Multicore Hypervisor/LWE Implementations 19 0 English AN4064: This document explains how to enable and utilize 36-bit physical addressing. It describes the 36-bit capabilities of the e600 and e500v2, and later processor families. Addressing and memory management in a computer system is a difficult topic that is largely beyond the scope of this document. This section explains some of the basic concepts that are essential to understand in order to develop system-level software that utilizes 36-bit physical addressing. 1269842191514722596708 PSP 576.8 KB None None documents None 1269842191514722596708 /docs/en/application-note/AN4064.pdf 576818 /docs/en/application-note/AN4064.pdf AN4064 documents N 2016-10-31 AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes /docs/en/application-note/AN4064.pdf /docs/en/application-note/AN4064.pdf Application Note N 645036621402383989 2022-12-07 pdf en Mar 28, 2010 645036621402383989 Application Note N AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes 20 1 English This application note describes basic jitter terminology and the aspects pertaining to the SYSCLK clock design requirements. 1264143083962735811350 PSP 514.4 KB None None documents None 1264143083962735811350 /docs/en/application-note/AN4056.pdf 514364 /docs/en/application-note/AN4056.pdf AN4056 documents N 2016-10-31 Understanding SYSCLK Jitter /docs/en/application-note/AN4056.pdf /docs/en/application-note/AN4056.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 18, 2010 645036621402383989 Application Note N Understanding SYSCLK Jitter 21 0 English AN4026SW.zip /secured/assets/documents/en/application-note-software/AN4026SW.zip /webapp/Download?colCode=AN4026SW&appType=license&docLang=en A common use of the QUICC Engine block is to establish an HDLC communication path over a TDM interface, such as a T1 or E1 link. This application note describes the various sub-blocks used in the QUICC Engine communications engine for this application, discusses how the sub-blocks interoperate with each other, describes how to initialize them for the HDLC communication path, and provides a software demonstration of HDLC mode via a TDM interface using on-chip loopback. 1260992898773711434436 PSP 718.0 KB None None documents None 1260992898773711434436 /docs/en/application-note/AN4026.pdf 718019 /docs/en/application-note/AN4026.pdf AN4026 documents N 2009-12-17 Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC /docs/en/application-note/AN4026.pdf /docs/en/application-note/AN4026.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 17, 2009 645036621402383989 Application Note N Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC 22 0 English High-level data link control (HDLC) is widely used in the telecommunications and networking industries. NXP&#8217;s PowerQUICC&#8482; communications processors have extensive support for HDLC protocol through the communications processor module (CPM) and QUICC Engine&#8482; technologies.&#13;&#10;&#13;&#10;This application note explains how NXP&#8217;s existing&#13;&#10;PowerQUICC communications processors use the CPM and QUICC Engine technologies to support the HDLC protocol and provides HDLC e 1258066893562722616236 PSP 496.6 KB None None documents None 1258066893562722616236 /docs/en/application-note/AN3966.pdf 496625 /docs/en/application-note/AN3966.pdf AN3966 documents N 2016-10-31 PowerQUICC™ HDLC Support and Example Code /docs/en/application-note/AN3966.pdf /docs/en/application-note/AN3966.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 10, 2009 645036621402383989 Application Note N PowerQUICC™ HDLC Support and Example Code 23 2 English NXP Semiconductors Power Architecture&#8482;&#13;&#10;technology-based evaluation and development platforms may optionally implement a &#8220;System ID&#8221; non-volatile memory device. This device stores important configuration data about the board. 1213738938672737755656 PSP 495.3 KB None None documents None 1213738938672737755656 /docs/en/application-note/AN3638.pdf 495318 /docs/en/application-note/AN3638.pdf AN3638 documents N N 2016-10-31 The SystemID Format for Power Architecture™ Development Systems /docs/en/application-note/AN3638.pdf /docs/en/application-note/AN3638.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 26, 2009 645036621402383989 Application Note N The SystemID Format for Power Architecture™ Development Systems 24 0 English This document is an overview of how to configure&#13;&#10;PowerQUICC<sup>&#174;</sup> III and QorIQ<sup>&#174;</sup> P1xx/P2xx devices to boot from serial RapidIO&#8482; or PCI Express&#8482; with no additional boot flash/EEPROM. 1256145464773713684480 PSP 543.1 KB Registration without Disclaimer None documents Extended 1256145464773713684480 /secured/assets/documents/en/application-note/AN3646.pdf 543108 /secured/assets/documents/en/application-note/AN3646.pdf AN3646 documents Y N 2016-10-31 Booting from Serial RapidIO™/PCI Express™ on PowerQUICC™ III and QorIQ™ P1xx/P2xx /webapp/Download?colCode=AN3646&lang_cd=ja /secured/assets/documents/en/application-note/AN3646.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Oct 21, 2009 645036621402383989 Application Note N Booting from Serial RapidIO™/PCI Express™ on PowerQUICC™ III and QorIQ™ P1xx/P2xx 25 2 English AN2810SW.zip /secured/assets/documents/en/application-note-software/AN2810SW.zip /webapp/Download?colCode=AN2810SW&appType=license&docLang=en This application note describes how to effectively program and use the universal programmable machine (UPM) in the PowerQUICC<sup>&#174;</sup> line of communication processors through NXP&#8217;s UPM software tools. 1104253596524716967025 PSP 807.8 KB None None documents None 1104253596524716967025 /docs/en/application-note/AN2810.pdf 807775 /docs/en/application-note/AN2810.pdf AN2810 documents N 2005-01-03 PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration /docs/en/application-note/AN2810.pdf /docs/en/application-note/AN2810.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 20, 2009 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration 26 1 English Application Note 1060017730134725666689 PSP 612.9 KB None None documents None 1060017730134725666689 /docs/en/application-note/AN2490.pdf 612895 /docs/en/application-note/AN2490.pdf AN2490 documents N 2016-10-31 MPC603e and e500 Register Model Comparison /docs/en/application-note/AN2490.pdf /docs/en/application-note/AN2490.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 23, 2009 645036621402383989 Application Note N MPC603e and e500 Register Model Comparison 27 0 English This application note explains configuration&#13;&#10;requirements to assist users to successfully program and set up this interface type. It also compares SGMII to other gigabit Ethernet standards and interfaces. 1244236817778728476903 PSP 692.4 KB Registration without Disclaimer None documents Extended 1244236817778728476903 /secured/assets/documents/en/application-note/AN3869.pdf 692438 /secured/assets/documents/en/application-note/AN3869.pdf AN3869 documents Y N 2016-10-31 Implementing SGMII Interfaces on the PowerQUICC™ III /webapp/Download?colCode=AN3869&lang_cd=ja /secured/assets/documents/en/application-note/AN3869.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Jun 5, 2009 645036621402383989 Application Note N Implementing SGMII Interfaces on the PowerQUICC™ III 28 5 English This document explains how the frequency divider to calculate the SCL speed of the I2C interface is determined for the MPC824x, MPC83xx, MPC85xx, and MPC86xx devices. 1119553728324723212395 PSP 611.4 KB Registration without Disclaimer None documents Extended 1119553728324723212395 /secured/assets/documents/en/application-note/AN2919.pdf 611358 /secured/assets/documents/en/application-note/AN2919.pdf AN2919 documents Y N 2016-10-31 Determining the I2C Frequency Divider Ratio for SCL /webapp/Download?colCode=AN2919&lang_cd=ja /secured/assets/documents/en/application-note/AN2919.pdf Application Note N 645036621402383989 2022-12-07 pdf Y en Dec 31, 2008 645036621402383989 Application Note N Determining the I2C Frequency Divider Ratio for SCL 29 0 English AN3541SW.zip /docs/en/application-note-software/AN3541SW.zip /docs/en/application-note-software/AN3541SW.zip This software package is an example exercising the&#13;&#10;multichannel communication controller (MCC) of the&#13;&#10;MPC8560 PowerQUICC&#8482; III. It should serve as a reference&#13;&#10;that illustrates how to initialize the MCC itself, the interrupt&#13;&#10;controller, the serial interface, and other related steps in&#13;&#10;order to educate the user and serve as a starting point for&#13;&#10;design. This software is very low-level in nature, in regards&#13;&#10;to the OSI reference model, only addr 1201725607257680148988 PSP 465.8 KB None None documents None 1201725607257680148988 /docs/en/application-note/AN3541.pdf 465755 /docs/en/application-note/AN3541.pdf AN3541 documents N 2008-01-30 Multichannel Communication Controller HDLC Superchannel Mode on the MPC8560 /docs/en/application-note/AN3541.pdf /docs/en/application-note/AN3541.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 30, 2008 645036621402383989 Application Note Y N Multichannel Communication Controller HDLC Superchannel Mode on the MPC8560 30 0 English This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. 1198270786976715604383 PSP 547.7 KB None None documents None 1198270786976715604383 /docs/en/application-note/AN3544.pdf 547694 /docs/en/application-note/AN3544.pdf AN3544 documents N 2016-10-31 PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf /docs/en/application-note/AN3544.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 21, 2007 645036621402383989 Application Note N PowerQUICC™ Data Cache Coherency 31 1 English This document describes aspects of memory synchronization and cache coherency requirements for NXP&#8217;s PowerQUICC<sup>&#174;</sup>&#8482; III product family. Coherency and synchronization need be considered, both for data and instructions, when initializing memory or moving memory contents from one location to another. 1191253168152709402147 PSP 189.0 KB None None documents None 1191253168152709402147 /docs/en/application-note/AN3441.pdf 188954 /docs/en/application-note/AN3441.pdf AN3441 documents N 2016-10-31 Coherency and Synchronization Requirements for PowerQUICC™ III /docs/en/application-note/AN3441.pdf /docs/en/application-note/AN3441.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 17, 2007 645036621402383989 Application Note N Coherency and Synchronization Requirements for PowerQUICC™ III 32 0 English This application note provides an introduction to the error correcting code (ECC) technology as well as an aid to initialization and error recovery on Our PowerQUICC<sup>&#174;</sup> III family of processors. 1196228463425717224884 PSP 573.0 KB None None documents None 1196228463425717224884 /docs/en/application-note/AN3532.pdf 572952 /docs/en/application-note/AN3532.pdf AN3532 documents N 2016-10-31 Error Correction and Error Handling on PowerQUICC (TM) III Processors /docs/en/application-note/AN3532.pdf /docs/en/application-note/AN3532.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 27, 2007 645036621402383989 Application Note N Error Correction and Error Handling on PowerQUICC (TM) III Processors 33 0 English AN3445: This application note outlines general, high-level, architectural differences between the e300 and e500 family processors. The e300 family (which are based on the original 603 design) was designed to the original PowerPC architecture definition. The e500v1 and e500v2 processors are designed to what was originally the PowerPC Book E architecture and NXP?s embedded implementation standards (EIS). 1194389310604697206738 PSP 935.0 KB None None documents None 1194389310604697206738 /docs/en/application-note/AN3445.pdf 934951 /docs/en/application-note/AN3445.pdf AN3445 documents N 2016-10-31 AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3445.pdf /docs/en/application-note/AN3445.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 31, 2007 645036621402383989 Application Note N AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes 34 0 English AN3531: This application note outlines general, high-level, architectural differences between the e600 and e500 family processors. Is intended as a general guideline for programmers and system designers who are assessing the efforts required in migrating to e500-based devices. 1194389312415718217914 PSP 961.6 KB None None documents None 1194389312415718217914 /docs/en/application-note/AN3531.pdf 961596 /docs/en/application-note/AN3531.pdf AN3531 documents N N 2016-10-31 AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3531.pdf /docs/en/application-note/AN3531.pdf Application Note N 645036621402383989 2022-12-07 pdf N en Oct 31, 2007 645036621402383989 Application Note N AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes 35 6 English Embedded systems that utilize double data rate memory (DDR) can realize increased performance over traditional single data rate (SDR) memories. As the name implies, DDR enables two data transactions to occur within a single clock cycle without having to double the applied clock or without having to double the size of the data bus. This increased data bus performance is achieved by the introduction of source-synchronous data strobes that permit data to be captured on both the falling and rising edges of the 1070392201176701407042 PSP 839.2 KB None None documents None 1070392201176701407042 /docs/en/application-note/AN2582.pdf 839193 /docs/en/application-note/AN2582.pdf AN2582 documents N 2003-12-02 Hardware and Layout Design Considerations for DDR Memory Interfaces /docs/en/application-note/AN2582.pdf /docs/en/application-note/AN2582.pdf Application Note N 645036621402383989 2022-12-07 pdf en Apr 3, 2007 645036621402383989 Application Note Y N Hardware and Layout Design Considerations for DDR Memory Interfaces 36 0 English This document reviews the use of Ethernet and RapidIO as a system interconnect fabric, comparing them against the requirements for such fabrics. Quantitative analysis is presented where possible. 1171553356793694633748 PSP 784.2 KB None None documents None 1171553356793694633748 /docs/en/application-note/AN3088.pdf 784203 /docs/en/application-note/AN3088.pdf AN3088 documents N 2007-02-15 System Interconnect Fabrics: Ethernet Versus RapidIO /docs/en/application-note/AN3088.pdf /docs/en/application-note/AN3088.pdf Application Note N 645036621402383989 2022-12-07 pdf en Feb 15, 2007 645036621402383989 Application Note Y N System Interconnect Fabrics: Ethernet Versus RapidIO 37 2 English This application note outlines relevant considerations for migrating from the MPC826x (PowerQUICC<sup>&#174;</sup> II) family of devices to the higher performance MPC85xx (PowerQUICC III) family. This document explains the differences between the main system blocks and internal cores, explores the initialization and reset sequences, and details the minor modifications required to run existing PowerQUICC II software on PowerQUICC III. 1087308016033730972785 PSP 700.6 KB None None documents None 1087308016033730972785 /docs/en/application-note/AN2662.pdf 700560 /docs/en/application-note/AN2662.pdf AN2662 documents N 2004-06-15 Migrating from PowerQUICC<sup>&#174;</sup> II to PowerQUICC III /docs/en/application-note/AN2662.pdf /docs/en/application-note/AN2662.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 13, 2007 645036621402383989 Application Note Y N Migrating from PowerQUICC<sup>&#174;</sup> II to PowerQUICC III 38 1 English This document details device driver and lower-level software migration from the IBM 440GP Embedded PowerPC&8452 processor by Applied Micro Circuits Corporation (AMCC) to the PowerQUICC<sup>&#174;</sup>&8452 III product family. Both processors are PowerPC based, so software migration has few caveats, leaving architects with decisions based more on hardware functionality and processor feature sets. 1085779032575704809575 PSP 658.2 KB None None documents None 1085779032575704809575 /docs/en/application-note/AN2661.pdf 658169 /docs/en/application-note/AN2661.pdf AN2661 documents N 2004-05-28 Software Migration from the IBM (AMCC) 440GP to the MPC8540 /docs/en/application-note/AN2661.pdf /docs/en/application-note/AN2661.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jan 12, 2007 645036621402383989 Application Note Y N Software Migration from the IBM (AMCC) 440GP to the MPC8540 39 2 English application note 113Pw1Fp PSP 146.5 KB None None documents None 113Pw1Fp /docs/en/application-note/AN2336.pdf 146508 /docs/en/application-note/AN2336.pdf AN2336 documents N 2003-03-31 Creating edink from DINK32 Code Using the e500 ISS /docs/en/application-note/AN2336.pdf /docs/en/application-note/AN2336.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 21, 2006 645036621402383989 Application Note Y N Creating edink from DINK32 Code Using the e500 ISS 40 1 English This document describes the implementation of a compact flash memory controller and interface on the local bus of a PowerQUICC<sup>&#174;</sup> MPC8560 processor. The hardware connection between the local bus and the compact flash device is described, and required register settings and UPM RAM array contents are provided. 1073689269420735274582 PSP 721.7 KB None None documents None 1073689269420735274582 /docs/en/application-note/AN2647.pdf 721719 /docs/en/application-note/AN2647.pdf AN2647 documents N 2004-01-12 MPC8560 PowerQUICC<sup>&#174;</sup> III Compact Flash Interface Design /docs/en/application-note/AN2647.pdf /docs/en/application-note/AN2647.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 12, 2006 645036621402383989 Application Note Y N MPC8560 PowerQUICC<sup>&#174;</sup> III Compact Flash Interface Design 41 1 English When migrating to a PowerQUICC<sup>&#174;</sup> III microprocessor, it is necessary to understand the differences among the MPC85xx three-speed Ethernet controller (MPC85xx TSEC), MPC8540 fast Ethernet controller (MPC8540 FEC), and previous Ethernet controllers. This application note summarizes these differences . 1077305678265727938199 PSP 542.9 KB None None documents None 1077305678265727938199 /docs/en/application-note/AN2652.pdf 542913 /docs/en/application-note/AN2652.pdf AN2652 documents N 2004-02-20 Migrating to PowerQUICC<sup>&#174;</sup> III TSEC from Previous Ethernet Controllers /docs/en/application-note/AN2652.pdf /docs/en/application-note/AN2652.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 15, 2006 645036621402383989 Application Note Y N Migrating to PowerQUICC<sup>&#174;</sup> III TSEC from Previous Ethernet Controllers 42 0 English This application note provides an overview of power&#13;&#10;dissipation concepts with the PowerQUICC<sup>&#174;</sup> III. The&#13;&#10;concepts of core and I/O power, as well as static and dynamic power, are distinguished. 1148077419355737901033 PSP 484.7 KB None None documents None 1148077419355737901033 /docs/en/application-note/AN3069.pdf 484734 /docs/en/application-note/AN3069.pdf AN3069 documents N 2006-05-23 PowerQUICC<sup>&#174;</sup> III Power Measurements Application Note /docs/en/application-note/AN3069.pdf /docs/en/application-note/AN3069.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jun 27, 2006 645036621402383989 Application Note Y N PowerQUICC<sup>&#174;</sup> III Power Measurements Application Note 43 0 English This document describes the requirements for connecting the CodeTEST<sup>&#174;</sup> Probe to the local bus &#13;&#10;of the MPC8540 and MPC8560 processors. 1145050670696692040714 PSP 102.0 KB None None documents None 1145050670696692040714 /docs/en/application-note/CWMPC8540_8560AN.pdf 102014 /docs/en/application-note/CWMPC8540_8560AN.pdf CWMPC8540_8560AN documents N 2006-04-14 Using the CodeTEST<sup>&#174;</sup> Probe with NXP<sup>&#174;</sup> MPC8540 and MPC8560 Processors /docs/en/application-note/CWMPC8540_8560AN.pdf /docs/en/application-note/CWMPC8540_8560AN.pdf Application Note N 645036621402383989 2022-12-07 pdf en Apr 14, 2006 645036621402383989 Application Note Y N Using the CodeTEST<sup>&#174;</sup> Probe with NXP<sup>&#174;</sup> MPC8540 and MPC8560 Processors 44 0 English This application note is provided to assist those engineers wishing to use the serial RapidIO message unit on the PowerQUICC<sup>&#174;</sup>&#8482; III. It summarizes the features and uses of the RapidIO messaging unit (including data messages, doorbell messages and inbound port-writes) and provides example code. These extracted code segments are part of a simple application, written to run on top of U-Boot, to prove the functionality of the messaging unit. 1127154752940725970276 PSP 530.6 KB None None documents None 1127154752940725970276 /docs/en/application-note/AN2923.pdf 530575 /docs/en/application-note/AN2923.pdf AN2923 documents N 2005-09-19 Using the Serial RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2923.pdf /docs/en/application-note/AN2923.pdf Application Note N 645036621402383989 2022-12-07 pdf en Sep 19, 2005 645036621402383989 Application Note Y N Using the Serial RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III 45 0 English Application Note 1121723523468733967996 PSP 1.1 MB None None documents None 1121723523468733967996 /docs/en/application-note/AN2916.pdf 1066812 /docs/en/application-note/AN2916.pdf AN2916 documents N 2005-07-18 AN2916: eDINK for MPC8560ADS /docs/en/application-note/AN2916.pdf /docs/en/application-note/AN2916.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jul 18, 2005 645036621402383989 Application Note Y N AN2916: eDINK for MPC8560ADS 46 0 English AN2665: This application note provides information to programmers so that they may write optimal code for the PowerPC ? e500 embedded microprocessor cores. The e500 core implements the Book E version of the PowerPC architecture. In addition, the e500 core adheres to the NXP Book E implementation standards (EIS). These standards were developed to ensure consistency among NXP?s Book E implementations. 1112972998032717039588 PSP 799.6 KB None None documents None 1112972998032717039588 /docs/en/application-note/AN2665.pdf 799625 /docs/en/application-note/AN2665.pdf AN2665 documents N 2016-10-31 AN2665, e500 Software Optimization Guide (eSOG) - Application Notes /docs/en/application-note/AN2665.pdf /docs/en/application-note/AN2665.pdf Application Note N 645036621402383989 2022-12-07 pdf en Apr 8, 2005 645036621402383989 Application Note N AN2665, e500 Software Optimization Guide (eSOG) - Application Notes 47 1 English Application Note 1086119130396717070015 PSP 551.6 KB None None documents None 1086119130396717070015 /docs/en/application-note/AN2657.pdf 551556 /docs/en/application-note/AN2657.pdf AN2657 documents N 2004-06-01 Designing a Universal PowerQUICC<sup>&#174;</sup> III Board: MPC8560 and MPC8555 /docs/en/application-note/AN2657.pdf /docs/en/application-note/AN2657.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 8, 2004 645036621402383989 Application Note Y N Designing a Universal PowerQUICC<sup>&#174;</sup> III Board: MPC8560 and MPC8555 48 0 English AN2804SW.ZIP /secured/assets/documents/en/application-note-software/AN2804SW.ZIP /webapp/Download?colCode=AN2804SW&appType=license&docLang=en AN2804 1102116472153721889459 PSP 508.5 KB None None documents None 1102116472153721889459 /docs/en/application-note/AN2804.pdf 508541 /docs/en/application-note/AN2804.pdf AN2804 documents N 2004-12-06 AN2804: Watchdog Timer for e500 /docs/en/application-note/AN2804.pdf /docs/en/application-note/AN2804.pdf Application Note N 645036621402383989 2022-12-07 pdf en Dec 3, 2004 645036621402383989 Application Note Y N AN2804: Watchdog Timer for e500 49 1 English AN2753SW.zip /secured/assets/documents/en/application-note-software/AN2753SW.zip /webapp/Download?colCode=AN2753SW&appType=license&docLang=en The MPC8540 and MPC8560 PowerQUICC<sup>&#174;</sup> III&#8482; processors have an 8-bit parallel RapidIO interface. This document provides guidance in the basic use of this interface; detailing the setup of local and remote processors starting with basic verification and discovery, then describing booting over RapidIO and conducting simple memory tests. 1100540757973695254153 PSP 1.0 MB None None documents None 1100540757973695254153 /docs/en/application-note/AN2753.pdf 1038425 /docs/en/application-note/AN2753.pdf AN2753 documents N 2004-11-15 RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2753.pdf /docs/en/application-note/AN2753.pdf Application Note N 645036621402383989 2022-12-07 pdf en Nov 15, 2004 645036621402383989 Application Note Y N RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III 50 1 English Application note 1096906262959704348247 PSP 211.8 KB None None documents None 1096906262959704348247 /docs/en/application-note/AN2663.pdf 211783 /docs/en/application-note/AN2663.pdf AN2663 documents N 2004-10-04 A Cache Primer /docs/en/application-note/AN2663.pdf /docs/en/application-note/AN2663.pdf Application Note N 645036621402383989 2022-12-07 pdf en Oct 4, 2004 645036621402383989 Application Note Y N A Cache Primer 51 1 English This application note is provided to assist those engineers wishing to use the RapidIO Message Unit on the PowerQUICC<sup>&#174;</sup> III(tm). It has been written for and tested on the MPC8540 and MPC8560 processors, but may also apply to other members of the PowerQUICC III family. 1093306503410700789339 PSP 154.0 KB None None documents None 1093306503410700789339 /docs/en/application-note/AN2741.pdf 153962 /docs/en/application-note/AN2741.pdf AN2741 documents N 2004-08-23 Using the RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2741.pdf /docs/en/application-note/AN2741.pdf Application Note N 645036621402383989 2022-12-07 pdf en Aug 23, 2004 645036621402383989 Application Note Y N Using the RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III 52 0 English Application note 1091114676455721383781 PSP 112.0 KB None None documents None 1091114676455721383781 /docs/en/application-note/AN2745.pdf 112007 /docs/en/application-note/AN2745.pdf AN2745 documents N 2004-07-29 Setting Up TSEC Hash Tables /docs/en/application-note/AN2745.pdf /docs/en/application-note/AN2745.pdf Application Note N 645036621402383989 2022-12-07 pdf en Jul 29, 2004 645036621402383989 Application Note Y N Setting Up TSEC Hash Tables ユーザ・ガイド User Guide 1 53 0.1 English user's guide 1098392753878714027806 PSP 7.0 MB None None documents None 1098392753878714027806 /docs/en/user-guide/MPC8560UG.pdf 7030165 /docs/en/user-guide/MPC8560UG.pdf MPC8560UG documents N 2004-10-21 MPC8560 Torridon Design Guide /docs/en/user-guide/MPC8560UG.pdf /docs/en/user-guide/MPC8560UG.pdf User Guide N 132339537837198660 2023-06-19 pdf en Dec 16, 2004 132339537837198660 User Guide Y N MPC8560 Torridon Design Guide アプリケーション・ノート・ソフトウェア Application Note Software 8 54 0 English 1258066894053701788655 PSP 330.9 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended 1258066894053701788655 /secured/assets/documents/en/application-note-software/AN3966SW.zip 330857 /secured/assets/documents/en/application-note-software/AN3966SW.zip AN3966SW documents Y N 2016-10-31 Software to accompany application note AN3966 /webapp/Download?colCode=AN3966SW&appType=license&lang_cd=ja /secured/assets/documents/en/application-note-software/AN3966SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Nov 10, 2009 789425793691620447 Application Note Software N Software to accompany application note AN3966 55 0 English This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. 1181767584945705509512 PSP 163.7 KB None None documents None 1181767584945705509512 /docs/en/application-note-software/AN3372.pdf 163681 /docs/en/application-note-software/AN3372.pdf AN3372 documents N 2016-10-31 Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf /docs/en/application-note-software/AN3372.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en Jun 13, 2007 789425793691620447 Application Note Software N Challenges in Testing for Power Rail Shorts with New Technologies 56 1 English To help expedite Power Architecture board bringup, this application note describes how to port the CodeWarrior target initialization file from the NXP MPC8555CDS development system to a custom development system. The target initialization file offers many benefits, such as the ability to debug a system before there is working code and a working system. 1177528532487728727257 PSP 955.3 KB None None documents None 1177528532487728727257 /docs/en/application-note-software/AN3366.pdf 955336 /docs/en/application-note-software/AN3366.pdf AN3366 documents N 2007-04-25 Simplifying Board Bringup: Porting a CodeWarrior<sup>&#174;</sup> Initialization File to Your System /docs/en/application-note-software/AN3366.pdf /docs/en/application-note-software/AN3366.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en May 22, 2007 789425793691620447 Application Note Software D N Simplifying Board Bringup: Porting a CodeWarrior<sup>&#174;</sup> Initialization File to Your System 57 2 English AN2810, PowerQUICC<sup>&#174;</sup> UPM Configuration, PowerQUICC, Universal Programmable Machine, Configuration, Application Note 1113503860374718430905 PSP 5.6 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended 1113503860374718430905 /secured/assets/documents/en/application-note-software/AN2810SW.zip 5555 /secured/assets/documents/en/application-note-software/AN2810SW.zip AN2810SW documents Y N 2005-04-14 AN2810 Supporting Files /webapp/Download?colCode=AN2810SW&appType=license&lang_cd=ja /secured/assets/documents/en/application-note-software/AN2810SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Aug 15, 2006 789425793691620447 Application Note Software N AN2810 Supporting Files 58 0 English This application note describes how to initialize the MPC8560 TSEC controller. The software is written for the TSEC controller and it is tested on the MPC8560ADS board. 1132348070221711838446 PSP 449.7 KB None None documents None 1132348070221711838446 /docs/en/application-note-software/AN2925.pdf 449650 /docs/en/application-note-software/AN2925.pdf AN2925 documents N 2005-11-18 AN2925: Initializing the TSEC Controller /docs/en/application-note-software/AN2925.pdf /docs/en/application-note-software/AN2925.pdf Application Note Software N 789425793691620447 2022-12-07 pdf en Nov 18, 2005 789425793691620447 Application Note Software D N AN2925: Initializing the TSEC Controller 59 0 English This application note describes how to initialize the MPC8560 TSEC controller. The software is written for the TSEC controller and it is tested on the MPC8560ADS board. 1132348359136747653641 PSP 592.8 KB Click-Thru Software Licensing Agreement-No Registration 1395958162559706127527 documents None 1132348359136747653641 /docs/en/application-note-software/AN2925SW.zip 592810 /docs/en/application-note-software/AN2925SW.zip AN2925SW documents N 2016-10-31 AN2925: Initializing the TSEC Controller Software /webapp/sps/download/license.jsp?colCode=AN2925SW&lang_cd=ja /docs/en/application-note-software/AN2925SW.zip Application Note Software N 789425793691620447 2023-10-11 zip en Nov 18, 2005 789425793691620447 Application Note Software N AN2925: Initializing the TSEC Controller Software 60 0 English Software to Accompany Application Note AN2804 1102438667512710961271 PSP 166.6 KB Registration With Click-Thru Software Licensing Agreement 1395958162559706127527 documents Extended 1102438667512710961271 /secured/assets/documents/en/application-note-software/AN2804SW.ZIP 166584 /secured/assets/documents/en/application-note-software/AN2804SW.ZIP AN2804SW documents Y N 2004-12-07 Software to Accompany AN2804: Watchdog Timer for the e500 /webapp/Download?colCode=AN2804SW&appType=license&lang_cd=ja /secured/assets/documents/en/application-note-software/AN2804SW.ZIP Application Note Software N 789425793691620447 2022-12-07 ZIP Y en Dec 6, 2004 789425793691620447 Application Note Software N Software to Accompany AN2804: Watchdog Timer for the e500 61 1 English This software in this file provides an example of an application to bring up a basic RapidIO system. The procedure is fully documented in Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III. 1100539527717722164542 PSP 531.8 KB Registration With Click-Thru Software Licensing Agreement 0yqzWSYK documents Extended 1100539527717722164542 /secured/assets/documents/en/application-note-software/AN2753SW.zip 531756 /secured/assets/documents/en/application-note-software/AN2753SW.zip AN2753SW documents Y N 2004-11-15 Software to Accompany Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC III&#8482; /webapp/Download?colCode=AN2753SW&appType=license&lang_cd=ja /secured/assets/documents/en/application-note-software/AN2753SW.zip Application Note Software N 789425793691620447 2022-12-07 zip Y en Nov 15, 2004 789425793691620447 Application Note Software N Software to Accompany Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC III&#8482; エンジニアリング・ブリテン Technical Notes 1 62 1 English This engineering bulletin provides the official mapping between Motorola Book E Implementation Standard APUs and the numberic APU IDs that are used in the APUinfo section. 118rHbxM PSP 149.2 KB None None documents None 118rHbxM /docs/en/engineering-bulletin/EB622.pdf 149247 /docs/en/engineering-bulletin/EB622.pdf EB622 documents N N 2016-10-31 Freescale Semiconductor Book E Implementation Standards: APU ID Reference /docs/en/engineering-bulletin/EB622.pdf /docs/en/engineering-bulletin/EB622.pdf Technical Notes N 389245547230346745 2022-12-07 pdf N en May 9, 2003 389245547230346745 Technical Notes Y N Freescale Semiconductor Book E Implementation Standards: APU ID Reference パッケージ情報 Package Information 1 63 1 English This document is a presentation on understanding the FC-PBGA package. 1273780789511716723050 PSP 5.2 MB None None documents None 1273780789511716723050 /docs/en/package-information/FC-PBGAPRES.pdf 5219387 /docs/en/package-information/FC-PBGAPRES.pdf FC-PBGAPRES documents N N 2016-10-31 Flip Chip Plastic Ball Grid Array (FC-PBGA) Presentation /docs/en/package-information/FC-PBGAPRES.pdf /docs/en/package-information/FC-PBGAPRES.pdf Package Information N 302435339416912908 2022-12-07 pdf N en Jul 8, 2015 302435339416912908 Package Information N Flip Chip Plastic Ball Grid Array (FC-PBGA) Presentation 製品概要 Product Brief 1 64 0 English product brief 1118266163094700804380 PSP 438.0 KB None None documents None 1118266163094700804380 /docs/en/product-brief/QUICC_CODESPB.pdf 438044 /docs/en/product-brief/QUICC_CODESPB.pdf QUICC_CODESPB documents N 2005-06-08 QUICC Code Solutions for the PowerQUICC<sup>&#174;</sup> II and PowerQUICC III Families /docs/en/product-brief/QUICC_CODESPB.pdf /docs/en/product-brief/QUICC_CODESPB.pdf Product Brief N 899114358132306053 2022-12-07 pdf en Jun 8, 2005 899114358132306053 Product Brief Y N QUICC Code Solutions for the PowerQUICC<sup>&#174;</sup> II and PowerQUICC III Families ホワイト・ペーパ White Paper 4 65 0 English The focus of this white paper is to provide the end user with high level design considerations and/or trade-offs associated with migrating from SDRAM to DDR SDRAM-based designs. 1208376896761708228520 PSP 735.3 KB None None documents None 1208376896761708228520 /docs/en/white-paper/DDRSDRAMWP.pdf 735286 /docs/en/white-paper/DDRSDRAMWP.pdf DDRSDRAMWP documents N N 2016-10-31 Comparison of DDRx and SDRAM /docs/en/white-paper/DDRSDRAMWP.pdf /docs/en/white-paper/DDRSDRAMWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Apr 16, 2008 918633085541740938 White Paper Y N Comparison of DDRx and SDRAM 66 1 English White Paper 1109024327078700240135 PSP 246.1 KB None None documents None 1109024327078700240135 /docs/en/white-paper/NANDFLASHWP.pdf 246130 /docs/en/white-paper/NANDFLASHWP.pdf NANDFLASHWP documents N N 2016-10-31 How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash /docs/en/white-paper/NANDFLASHWP.pdf /docs/en/white-paper/NANDFLASHWP.pdf White Paper N 918633085541740938 2023-06-19 pdf N en Oct 24, 2005 918633085541740938 White Paper Y N How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash 67 1.0 English White Paper 1071689613628715204473 PSP 408.0 KB None None documents None 1071689613628715204473 /docs/en/white-paper/MPC8560WP2.pdf 408012 /docs/en/white-paper/MPC8560WP2.pdf MPC8560WP2 documents N 2003-12-17 PowerQUICC<sup>&#174;</sup> III&#8482; Overview: Family of Next Generation Integrated Communications Processors /docs/en/white-paper/MPC8560WP2.pdf /docs/en/white-paper/MPC8560WP2.pdf White Paper N 918633085541740938 2022-12-07 pdf en Dec 17, 2003 918633085541740938 White Paper Y N PowerQUICC<sup>&#174;</sup> III&#8482; Overview: Family of Next Generation Integrated Communications Processors 68 1 English CompactPCI is a very high performance industrial bus based on the standard PCI electrical specification in a rugged 3U or 6U Eurocard packaging.Compared to standard desktop PCI, CompactPCI supports twice as many PCI slots (8 versus 4) and offers a packaging scheme that is much better suited for use in industrial applications. 1061232347112706857944 PSP 579.4 KB None None documents None 1061232347112706857944 /docs/en/white-paper/MPC8540CPCIWP.pdf 579375 /docs/en/white-paper/MPC8540CPCIWP.pdf MPC8540CPCIWP documents N 2003-08-18 Example MPC8540-Based CompactPCI Reference Design /docs/en/white-paper/MPC8540CPCIWP.pdf /docs/en/white-paper/MPC8540CPCIWP.pdf White Paper N 918633085541740938 2023-06-19 pdf en Nov 30, 2003 918633085541740938 White Paper Y N Example MPC8540-Based CompactPCI Reference Design false 0 MPC8560 downloads ja true 1 Y PSP アプリケーション・ノート 42 /docs/en/application-note/AN13461.pdf 2022-01-04 1641302649210707506203 PSP 11 Nov 30, 2021 Application Note Reviewing the troubleshoot microcontroller when there is a malfunction module. None /docs/en/application-note/AN13461.pdf English documents 302971 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN13461.pdf AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note /docs/en/application-note/AN13461.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N N AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note 303.0 KB AN13461 N 1641302649210707506203 /secured/assets/documents/en/application-note/AN3636.pdf 2017-04-28 1493403864930712885479 PSP 12 Apr 28, 2017 Application Note Using the Core and System Performance Monitors Registration without Disclaimer /secured/assets/documents/en/application-note/AN3636.pdf English documents 278345 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3636&lang_cd=ja PowerQUICC III Performance Monitors /secured/assets/documents/en/application-note/AN3636.pdf documents 645036621402383989 Application Note N en Extended Y pdf 2 Y N PowerQUICC III Performance Monitors 278.3 KB AN3636 N 1493403864930712885479 /secured/assets/documents/en/application-note/AN3645.pdf 2016-10-31 1224778148188710027580 PSP 13 Apr 28, 2017 Application Note This document is a supplement to the SEC 2/3x reference device driver. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3645.pdf English documents 1147132 None 645036621402383989 2023-06-18 Y /webapp/Download?colCode=AN3645&lang_cd=ja SEC 2/3x Descriptor Programmer’s Guide /secured/assets/documents/en/application-note/AN3645.pdf documents 645036621402383989 Application Note N en Extended pdf 3 Y N SEC 2/3x Descriptor Programmer’s Guide 1.1 MB AN3645 N 1224778148188710027580 /docs/en/application-note/AN2583.pdf 2003-12-01 1070297961506735248621 PSP 14 Jul 29, 2014 Application Note AN2583: This application note provides programming guidelines for the PowerQUICC<sup>&#174;</sup> DDR-SDRAM memory controller and specifically JEDEC-compatible DDR1 SDRAM memories. None /docs/en/application-note/AN2583.pdf English documents 333170 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN2583.pdf AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note /docs/en/application-note/AN2583.pdf documents 645036621402383989 Application Note N en None Y pdf 11 N N AN2583, Programming the PowerQUICC<sup>&#174;</sup> III/PowerQUICC II Pro DDR SDRAM Controller - Application Note 333.2 KB AN2583 N 1070297961506735248621 /docs/en/application-note/AN4531.pdf 2016-10-31 1363012931515701443659 PSP 15 Dec 16, 2013 Application Note This document describes the requirements and step-by-step procedures for forcing the DRAM into self-refresh mode. None /docs/en/application-note/AN4531.pdf English documents 269380 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN4531.pdf AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes /docs/en/application-note/AN4531.pdf documents 645036621402383989 Application Note N en None pdf 2 N N AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes 269.4 KB AN4531 N 1363012931515701443659 /secured/assets/documents/en/application-note/AN3939.pdf 2016-10-31 1251150824863717930878 PSP 16 Jun 30, 2010 Application Note This application note describes how to use and benefit from DDR memory interleaving. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3939.pdf English documents 717276 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3939&lang_cd=ja DDR Interleaving for PowerQUICC and QorIQ Processors /secured/assets/documents/en/application-note/AN3939.pdf documents 645036621402383989 Application Note N en Extended Y pdf 1 Y N DDR Interleaving for PowerQUICC and QorIQ Processors 717.3 KB AN3939 N 1251150824863717930878 /docs/en/application-note/AN2752.pdf 2004-08-02 1091469965314713077158 PSP 17 Jun 29, 2010 Application Note This document provides recommendations for designs based on the MPC8540 and the MPC8560 devices. None /docs/en/application-note/AN2752.pdf English documents 581988 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2752.pdf PowerQUICC<sup>&#174;</sup> III Bring-Up Guideline /docs/en/application-note/AN2752.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N PowerQUICC<sup>&#174;</sup> III Bring-Up Guideline 582.0 KB AN2752 N 1091469965314713077158 /docs/en/application-note/AN3649.pdf 2016-10-31 1225213465876727613770 PSP 18 Apr 19, 2010 Application Note This application note explains the contents of the leader device tree in a multicore Hypervisor implementation used to allocate system resources to the individual partitions.&#13;&#10;Additionally, it describes the contents of the individual device trees that each partition uses for local allocation of those resources. None /docs/en/application-note/AN3649.pdf English documents 828938 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3649.pdf Understanding Device Tree Files in Multicore Hypervisor/LWE Implementations /docs/en/application-note/AN3649.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N N Understanding Device Tree Files in Multicore Hypervisor/LWE Implementations 828.9 KB AN3649 N 1225213465876727613770 /docs/en/application-note/AN4064.pdf 2016-10-31 1269842191514722596708 PSP 19 Mar 28, 2010 Application Note AN4064: This document explains how to enable and utilize 36-bit physical addressing. It describes the 36-bit capabilities of the e600 and e500v2, and later processor families. Addressing and memory management in a computer system is a difficult topic that is largely beyond the scope of this document. This section explains some of the basic concepts that are essential to understand in order to develop system-level software that utilizes 36-bit physical addressing. None /docs/en/application-note/AN4064.pdf English documents 576818 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4064.pdf AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes /docs/en/application-note/AN4064.pdf documents 645036621402383989 Application Note N en None pdf 0 N AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes 576.8 KB AN4064 N 1269842191514722596708 /docs/en/application-note/AN4056.pdf 2016-10-31 1264143083962735811350 PSP 20 Feb 18, 2010 Application Note This application note describes basic jitter terminology and the aspects pertaining to the SYSCLK clock design requirements. None /docs/en/application-note/AN4056.pdf English documents 514364 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4056.pdf Understanding SYSCLK Jitter /docs/en/application-note/AN4056.pdf documents 645036621402383989 Application Note N en None pdf 1 N Understanding SYSCLK Jitter 514.4 KB AN4056 N 1264143083962735811350 /docs/en/application-note/AN4026.pdf 2009-12-17 1260992898773711434436 PSP 21 Dec 17, 2009 Application Note A common use of the QUICC Engine block is to establish an HDLC communication path over a TDM interface, such as a T1 or E1 link. This application note describes the various sub-blocks used in the QUICC Engine communications engine for this application, discusses how the sub-blocks interoperate with each other, describes how to initialize them for the HDLC communication path, and provides a software demonstration of HDLC mode via a TDM interface using on-chip loopback. None /docs/en/application-note/AN4026.pdf English documents 718019 None 645036621402383989 2022-12-07 /docs/en/application-note/AN4026.pdf Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC /docs/en/application-note/AN4026.pdf documents 645036621402383989 Application Note N en None pdf 0 N Communicating via HDLC over a TDM Interface with a QUICC Engine&#8482; UCC 718.0 KB AN4026 N 1260992898773711434436 /docs/en/application-note/AN3966.pdf 2016-10-31 1258066893562722616236 PSP 22 Nov 10, 2009 Application Note High-level data link control (HDLC) is widely used in the telecommunications and networking industries. NXP&#8217;s PowerQUICC&#8482; communications processors have extensive support for HDLC protocol through the communications processor module (CPM) and QUICC Engine&#8482; technologies.&#13;&#10;&#13;&#10;This application note explains how NXP&#8217;s existing&#13;&#10;PowerQUICC communications processors use the CPM and QUICC Engine technologies to support the HDLC protocol and provides HDLC e None /docs/en/application-note/AN3966.pdf English documents 496625 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3966.pdf PowerQUICC™ HDLC Support and Example Code /docs/en/application-note/AN3966.pdf documents 645036621402383989 Application Note N en None pdf 0 N PowerQUICC™ HDLC Support and Example Code 496.6 KB AN3966 N 1258066893562722616236 /docs/en/application-note/AN3638.pdf 2016-10-31 1213738938672737755656 PSP 23 Oct 26, 2009 Application Note NXP Semiconductors Power Architecture&#8482;&#13;&#10;technology-based evaluation and development platforms may optionally implement a &#8220;System ID&#8221; non-volatile memory device. This device stores important configuration data about the board. None /docs/en/application-note/AN3638.pdf English documents 495318 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3638.pdf The SystemID Format for Power Architecture™ Development Systems /docs/en/application-note/AN3638.pdf documents 645036621402383989 Application Note N en None pdf 2 N N The SystemID Format for Power Architecture™ Development Systems 495.3 KB AN3638 N 1213738938672737755656 /secured/assets/documents/en/application-note/AN3646.pdf 2016-10-31 1256145464773713684480 PSP 24 Oct 21, 2009 Application Note This document is an overview of how to configure&#13;&#10;PowerQUICC<sup>&#174;</sup> III and QorIQ<sup>&#174;</sup> P1xx/P2xx devices to boot from serial RapidIO&#8482; or PCI Express&#8482; with no additional boot flash/EEPROM. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3646.pdf English documents 543108 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3646&lang_cd=ja Booting from Serial RapidIO™/PCI Express™ on PowerQUICC™ III and QorIQ™ P1xx/P2xx /secured/assets/documents/en/application-note/AN3646.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N Booting from Serial RapidIO™/PCI Express™ on PowerQUICC™ III and QorIQ™ P1xx/P2xx 543.1 KB AN3646 N 1256145464773713684480 /docs/en/application-note/AN2810.pdf 2005-01-03 1104253596524716967025 PSP 25 Oct 20, 2009 Application Note This application note describes how to effectively program and use the universal programmable machine (UPM) in the PowerQUICC<sup>&#174;</sup> line of communication processors through NXP&#8217;s UPM software tools. None /docs/en/application-note/AN2810.pdf English documents 807775 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2810.pdf PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration /docs/en/application-note/AN2810.pdf documents 645036621402383989 Application Note N en None Y pdf 2 N PowerQUICC<sup>&#174;</sup>&#8482; UPM Configuration 807.8 KB AN2810 N 1104253596524716967025 /docs/en/application-note/AN2490.pdf 2016-10-31 1060017730134725666689 PSP 26 Sep 23, 2009 Application Note Application Note None /docs/en/application-note/AN2490.pdf English documents 612895 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2490.pdf MPC603e and e500 Register Model Comparison /docs/en/application-note/AN2490.pdf documents 645036621402383989 Application Note N en None pdf 1 N MPC603e and e500 Register Model Comparison 612.9 KB AN2490 N 1060017730134725666689 /secured/assets/documents/en/application-note/AN3869.pdf 2016-10-31 1244236817778728476903 PSP 27 Jun 5, 2009 Application Note This application note explains configuration&#13;&#10;requirements to assist users to successfully program and set up this interface type. It also compares SGMII to other gigabit Ethernet standards and interfaces. Registration without Disclaimer /secured/assets/documents/en/application-note/AN3869.pdf English documents 692438 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN3869&lang_cd=ja Implementing SGMII Interfaces on the PowerQUICC™ III /secured/assets/documents/en/application-note/AN3869.pdf documents 645036621402383989 Application Note N en Extended pdf 0 Y N Implementing SGMII Interfaces on the PowerQUICC™ III 692.4 KB AN3869 N 1244236817778728476903 /secured/assets/documents/en/application-note/AN2919.pdf 2016-10-31 1119553728324723212395 PSP 28 Dec 31, 2008 Application Note This document explains how the frequency divider to calculate the SCL speed of the I2C interface is determined for the MPC824x, MPC83xx, MPC85xx, and MPC86xx devices. Registration without Disclaimer /secured/assets/documents/en/application-note/AN2919.pdf English documents 611358 None 645036621402383989 2022-12-07 Y /webapp/Download?colCode=AN2919&lang_cd=ja Determining the I2C Frequency Divider Ratio for SCL /secured/assets/documents/en/application-note/AN2919.pdf documents 645036621402383989 Application Note N en Extended pdf 5 Y N Determining the I2C Frequency Divider Ratio for SCL 611.4 KB AN2919 N 1119553728324723212395 /docs/en/application-note/AN3541.pdf 2008-01-30 1201725607257680148988 PSP 29 Jan 30, 2008 Application Note This software package is an example exercising the&#13;&#10;multichannel communication controller (MCC) of the&#13;&#10;MPC8560 PowerQUICC&#8482; III. It should serve as a reference&#13;&#10;that illustrates how to initialize the MCC itself, the interrupt&#13;&#10;controller, the serial interface, and other related steps in&#13;&#10;order to educate the user and serve as a starting point for&#13;&#10;design. This software is very low-level in nature, in regards&#13;&#10;to the OSI reference model, only addr None /docs/en/application-note/AN3541.pdf English documents 465755 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3541.pdf Multichannel Communication Controller HDLC Superchannel Mode on the MPC8560 /docs/en/application-note/AN3541.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Multichannel Communication Controller HDLC Superchannel Mode on the MPC8560 465.8 KB AN3541 N 1201725607257680148988 /docs/en/application-note/AN3544.pdf 2016-10-31 1198270786976715604383 PSP 30 Dec 21, 2007 Application Note This application note provides an overview and specific strategies for cache coherency and potential performance impacts in the PowerQUICC<sup>&#174;</sup> II Pro and PowerQUICC III families. It focuses on data coherency and potential system issues, as well as some concerns associated with having multiple DMA devices. It also discusses the specific steps and interdependencies required to implement hardware enforced cache coherency. None /docs/en/application-note/AN3544.pdf English documents 547694 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3544.pdf PowerQUICC™ Data Cache Coherency /docs/en/application-note/AN3544.pdf documents 645036621402383989 Application Note N en None pdf 0 N PowerQUICC™ Data Cache Coherency 547.7 KB AN3544 N 1198270786976715604383 /docs/en/application-note/AN3441.pdf 2016-10-31 1191253168152709402147 PSP 31 Dec 17, 2007 Application Note This document describes aspects of memory synchronization and cache coherency requirements for NXP&#8217;s PowerQUICC<sup>&#174;</sup>&#8482; III product family. Coherency and synchronization need be considered, both for data and instructions, when initializing memory or moving memory contents from one location to another. None /docs/en/application-note/AN3441.pdf English documents 188954 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3441.pdf Coherency and Synchronization Requirements for PowerQUICC™ III /docs/en/application-note/AN3441.pdf documents 645036621402383989 Application Note N en None pdf 1 N Coherency and Synchronization Requirements for PowerQUICC™ III 189.0 KB AN3441 N 1191253168152709402147 /docs/en/application-note/AN3532.pdf 2016-10-31 1196228463425717224884 PSP 32 Nov 27, 2007 Application Note This application note provides an introduction to the error correcting code (ECC) technology as well as an aid to initialization and error recovery on Our PowerQUICC<sup>&#174;</sup> III family of processors. None /docs/en/application-note/AN3532.pdf English documents 572952 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3532.pdf Error Correction and Error Handling on PowerQUICC (TM) III Processors /docs/en/application-note/AN3532.pdf documents 645036621402383989 Application Note N en None pdf 0 N Error Correction and Error Handling on PowerQUICC (TM) III Processors 573.0 KB AN3532 N 1196228463425717224884 /docs/en/application-note/AN3445.pdf 2016-10-31 1194389310604697206738 PSP 33 Oct 31, 2007 Application Note AN3445: This application note outlines general, high-level, architectural differences between the e300 and e500 family processors. The e300 family (which are based on the original 603 design) was designed to the original PowerPC architecture definition. The e500v1 and e500v2 processors are designed to what was originally the PowerPC Book E architecture and NXP?s embedded implementation standards (EIS). None /docs/en/application-note/AN3445.pdf English documents 934951 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3445.pdf AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3445.pdf documents 645036621402383989 Application Note N en None pdf 0 N AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes 935.0 KB AN3445 N 1194389310604697206738 /docs/en/application-note/AN3531.pdf 2016-10-31 1194389312415718217914 PSP 34 Oct 31, 2007 Application Note AN3531: This application note outlines general, high-level, architectural differences between the e600 and e500 family processors. Is intended as a general guideline for programmers and system designers who are assessing the efforts required in migrating to e500-based devices. None /docs/en/application-note/AN3531.pdf English documents 961596 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN3531.pdf AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes /docs/en/application-note/AN3531.pdf documents 645036621402383989 Application Note N en None pdf 0 N N AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes 961.6 KB AN3531 N 1194389312415718217914 /docs/en/application-note/AN2582.pdf 2003-12-02 1070392201176701407042 PSP 35 Apr 3, 2007 Application Note Embedded systems that utilize double data rate memory (DDR) can realize increased performance over traditional single data rate (SDR) memories. As the name implies, DDR enables two data transactions to occur within a single clock cycle without having to double the applied clock or without having to double the size of the data bus. This increased data bus performance is achieved by the introduction of source-synchronous data strobes that permit data to be captured on both the falling and rising edges of the None /docs/en/application-note/AN2582.pdf English documents 839193 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2582.pdf Hardware and Layout Design Considerations for DDR Memory Interfaces /docs/en/application-note/AN2582.pdf documents 645036621402383989 Application Note N en None Y pdf 6 N Hardware and Layout Design Considerations for DDR Memory Interfaces 839.2 KB AN2582 N 1070392201176701407042 /docs/en/application-note/AN3088.pdf 2007-02-15 1171553356793694633748 PSP 36 Feb 15, 2007 Application Note This document reviews the use of Ethernet and RapidIO as a system interconnect fabric, comparing them against the requirements for such fabrics. Quantitative analysis is presented where possible. None /docs/en/application-note/AN3088.pdf English documents 784203 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3088.pdf System Interconnect Fabrics: Ethernet Versus RapidIO /docs/en/application-note/AN3088.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N System Interconnect Fabrics: Ethernet Versus RapidIO 784.2 KB AN3088 N 1171553356793694633748 /docs/en/application-note/AN2662.pdf 2004-06-15 1087308016033730972785 PSP 37 Jan 13, 2007 Application Note This application note outlines relevant considerations for migrating from the MPC826x (PowerQUICC<sup>&#174;</sup> II) family of devices to the higher performance MPC85xx (PowerQUICC III) family. This document explains the differences between the main system blocks and internal cores, explores the initialization and reset sequences, and details the minor modifications required to run existing PowerQUICC II software on PowerQUICC III. None /docs/en/application-note/AN2662.pdf English documents 700560 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2662.pdf Migrating from PowerQUICC<sup>&#174;</sup> II to PowerQUICC III /docs/en/application-note/AN2662.pdf documents 645036621402383989 Application Note N en None Y pdf 2 N Migrating from PowerQUICC<sup>&#174;</sup> II to PowerQUICC III 700.6 KB AN2662 N 1087308016033730972785 /docs/en/application-note/AN2661.pdf 2004-05-28 1085779032575704809575 PSP 38 Jan 12, 2007 Application Note This document details device driver and lower-level software migration from the IBM 440GP Embedded PowerPC&8452 processor by Applied Micro Circuits Corporation (AMCC) to the PowerQUICC<sup>&#174;</sup>&8452 III product family. Both processors are PowerPC based, so software migration has few caveats, leaving architects with decisions based more on hardware functionality and processor feature sets. None /docs/en/application-note/AN2661.pdf English documents 658169 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2661.pdf Software Migration from the IBM (AMCC) 440GP to the MPC8540 /docs/en/application-note/AN2661.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Software Migration from the IBM (AMCC) 440GP to the MPC8540 658.2 KB AN2661 N 1085779032575704809575 /docs/en/application-note/AN2336.pdf 2003-03-31 113Pw1Fp PSP 39 Dec 21, 2006 Application Note application note None /docs/en/application-note/AN2336.pdf English documents 146508 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2336.pdf Creating edink from DINK32 Code Using the e500 ISS /docs/en/application-note/AN2336.pdf documents 645036621402383989 Application Note N en None Y pdf 2 N Creating edink from DINK32 Code Using the e500 ISS 146.5 KB AN2336 N 113Pw1Fp /docs/en/application-note/AN2647.pdf 2004-01-12 1073689269420735274582 PSP 40 Dec 12, 2006 Application Note This document describes the implementation of a compact flash memory controller and interface on the local bus of a PowerQUICC<sup>&#174;</sup> MPC8560 processor. The hardware connection between the local bus and the compact flash device is described, and required register settings and UPM RAM array contents are provided. None /docs/en/application-note/AN2647.pdf English documents 721719 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2647.pdf MPC8560 PowerQUICC<sup>&#174;</sup> III Compact Flash Interface Design /docs/en/application-note/AN2647.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N MPC8560 PowerQUICC<sup>&#174;</sup> III Compact Flash Interface Design 721.7 KB AN2647 N 1073689269420735274582 /docs/en/application-note/AN2652.pdf 2004-02-20 1077305678265727938199 PSP 41 Nov 15, 2006 Application Note When migrating to a PowerQUICC<sup>&#174;</sup> III microprocessor, it is necessary to understand the differences among the MPC85xx three-speed Ethernet controller (MPC85xx TSEC), MPC8540 fast Ethernet controller (MPC8540 FEC), and previous Ethernet controllers. This application note summarizes these differences . None /docs/en/application-note/AN2652.pdf English documents 542913 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2652.pdf Migrating to PowerQUICC<sup>&#174;</sup> III TSEC from Previous Ethernet Controllers /docs/en/application-note/AN2652.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Migrating to PowerQUICC<sup>&#174;</sup> III TSEC from Previous Ethernet Controllers 542.9 KB AN2652 N 1077305678265727938199 /docs/en/application-note/AN3069.pdf 2006-05-23 1148077419355737901033 PSP 42 Jun 27, 2006 Application Note This application note provides an overview of power&#13;&#10;dissipation concepts with the PowerQUICC<sup>&#174;</sup> III. The&#13;&#10;concepts of core and I/O power, as well as static and dynamic power, are distinguished. None /docs/en/application-note/AN3069.pdf English documents 484734 None 645036621402383989 2022-12-07 /docs/en/application-note/AN3069.pdf PowerQUICC<sup>&#174;</sup> III Power Measurements Application Note /docs/en/application-note/AN3069.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N PowerQUICC<sup>&#174;</sup> III Power Measurements Application Note 484.7 KB AN3069 N 1148077419355737901033 /docs/en/application-note/CWMPC8540_8560AN.pdf 2006-04-14 1145050670696692040714 PSP 43 Apr 14, 2006 Application Note This document describes the requirements for connecting the CodeTEST<sup>&#174;</sup> Probe to the local bus &#13;&#10;of the MPC8540 and MPC8560 processors. None /docs/en/application-note/CWMPC8540_8560AN.pdf English documents 102014 None 645036621402383989 2022-12-07 /docs/en/application-note/CWMPC8540_8560AN.pdf Using the CodeTEST<sup>&#174;</sup> Probe with NXP<sup>&#174;</sup> MPC8540 and MPC8560 Processors /docs/en/application-note/CWMPC8540_8560AN.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the CodeTEST<sup>&#174;</sup> Probe with NXP<sup>&#174;</sup> MPC8540 and MPC8560 Processors 102.0 KB CWMPC8540_8560AN N 1145050670696692040714 /docs/en/application-note/AN2923.pdf 2005-09-19 1127154752940725970276 PSP 44 Sep 19, 2005 Application Note This application note is provided to assist those engineers wishing to use the serial RapidIO message unit on the PowerQUICC<sup>&#174;</sup>&#8482; III. It summarizes the features and uses of the RapidIO messaging unit (including data messages, doorbell messages and inbound port-writes) and provides example code. These extracted code segments are part of a simple application, written to run on top of U-Boot, to prove the functionality of the messaging unit. None /docs/en/application-note/AN2923.pdf English documents 530575 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2923.pdf Using the Serial RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2923.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Using the Serial RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III 530.6 KB AN2923 N 1127154752940725970276 /docs/en/application-note/AN2916.pdf 2005-07-18 1121723523468733967996 PSP 45 Jul 18, 2005 Application Note Application Note None /docs/en/application-note/AN2916.pdf English documents 1066812 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2916.pdf AN2916: eDINK for MPC8560ADS /docs/en/application-note/AN2916.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N AN2916: eDINK for MPC8560ADS 1.1 MB AN2916 N 1121723523468733967996 /docs/en/application-note/AN2665.pdf 2016-10-31 1112972998032717039588 PSP 46 Apr 8, 2005 Application Note AN2665: This application note provides information to programmers so that they may write optimal code for the PowerPC ? e500 embedded microprocessor cores. The e500 core implements the Book E version of the PowerPC architecture. In addition, the e500 core adheres to the NXP Book E implementation standards (EIS). These standards were developed to ensure consistency among NXP?s Book E implementations. None /docs/en/application-note/AN2665.pdf English documents 799625 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2665.pdf AN2665, e500 Software Optimization Guide (eSOG) - Application Notes /docs/en/application-note/AN2665.pdf documents 645036621402383989 Application Note N en None pdf 0 N AN2665, e500 Software Optimization Guide (eSOG) - Application Notes 799.6 KB AN2665 N 1112972998032717039588 /docs/en/application-note/AN2657.pdf 2004-06-01 1086119130396717070015 PSP 47 Dec 8, 2004 Application Note Application Note None /docs/en/application-note/AN2657.pdf English documents 551556 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2657.pdf Designing a Universal PowerQUICC<sup>&#174;</sup> III Board: MPC8560 and MPC8555 /docs/en/application-note/AN2657.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Designing a Universal PowerQUICC<sup>&#174;</sup> III Board: MPC8560 and MPC8555 551.6 KB AN2657 N 1086119130396717070015 /docs/en/application-note/AN2804.pdf 2004-12-06 1102116472153721889459 PSP 48 Dec 3, 2004 Application Note AN2804 None /docs/en/application-note/AN2804.pdf English documents 508541 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2804.pdf AN2804: Watchdog Timer for e500 /docs/en/application-note/AN2804.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N AN2804: Watchdog Timer for e500 508.5 KB AN2804 N 1102116472153721889459 /docs/en/application-note/AN2753.pdf 2004-11-15 1100540757973695254153 PSP 49 Nov 15, 2004 Application Note The MPC8540 and MPC8560 PowerQUICC<sup>&#174;</sup> III&#8482; processors have an 8-bit parallel RapidIO interface. This document provides guidance in the basic use of this interface; detailing the setup of local and remote processors starting with basic verification and discovery, then describing booting over RapidIO and conducting simple memory tests. None /docs/en/application-note/AN2753.pdf English documents 1038425 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2753.pdf RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2753.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III 1.0 MB AN2753 N 1100540757973695254153 /docs/en/application-note/AN2663.pdf 2004-10-04 1096906262959704348247 PSP 50 Oct 4, 2004 Application Note Application note None /docs/en/application-note/AN2663.pdf English documents 211783 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2663.pdf A Cache Primer /docs/en/application-note/AN2663.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N A Cache Primer 211.8 KB AN2663 N 1096906262959704348247 /docs/en/application-note/AN2741.pdf 2004-08-23 1093306503410700789339 PSP 51 Aug 23, 2004 Application Note This application note is provided to assist those engineers wishing to use the RapidIO Message Unit on the PowerQUICC<sup>&#174;</sup> III(tm). It has been written for and tested on the MPC8540 and MPC8560 processors, but may also apply to other members of the PowerQUICC III family. None /docs/en/application-note/AN2741.pdf English documents 153962 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2741.pdf Using the RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III /docs/en/application-note/AN2741.pdf documents 645036621402383989 Application Note N en None Y pdf 1 N Using the RapidIO Messaging Unit on PowerQUICC<sup>&#174;</sup> III 154.0 KB AN2741 N 1093306503410700789339 /docs/en/application-note/AN2745.pdf 2004-07-29 1091114676455721383781 PSP 52 Jul 29, 2004 Application Note Application note None /docs/en/application-note/AN2745.pdf English documents 112007 None 645036621402383989 2022-12-07 /docs/en/application-note/AN2745.pdf Setting Up TSEC Hash Tables /docs/en/application-note/AN2745.pdf documents 645036621402383989 Application Note N en None Y pdf 0 N Setting Up TSEC Hash Tables 112.0 KB AN2745 N 1091114676455721383781 アプリケーション・ノート・ソフトウェア 8 /secured/assets/documents/en/application-note-software/AN3966SW.zip 2016-10-31 1258066894053701788655 PSP 54 Nov 10, 2009 Application Note Software Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN3966SW.zip English documents 330857 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN3966SW&appType=license&lang_cd=ja Software to accompany application note AN3966 /secured/assets/documents/en/application-note-software/AN3966SW.zip documents 789425793691620447 Application Note Software N en Extended zip 0 Y N Software to accompany application note AN3966 330.9 KB AN3966SW N 1258066894053701788655 /docs/en/application-note-software/AN3372.pdf 2016-10-31 1181767584945705509512 PSP 55 Jun 13, 2007 Application Note Software This application note addresses a common challenge encountered during circuit board testing with some of the newer NXP microprocessors. It is common practice for board testing houses to test for shorts on the power rails by measuring the resistance from a power rail to the ground rail. In older technologies, this is a reasonable approach. However, this application note explains why this approach can be problematic when used with devices in newer technologies. None /docs/en/application-note-software/AN3372.pdf English documents 163681 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3372.pdf Challenges in Testing for Power Rail Shorts with New Technologies /docs/en/application-note-software/AN3372.pdf documents 789425793691620447 Application Note Software N en None pdf 0 N Challenges in Testing for Power Rail Shorts with New Technologies 163.7 KB AN3372 N 1181767584945705509512 /docs/en/application-note-software/AN3366.pdf 2007-04-25 1177528532487728727257 PSP 56 May 22, 2007 Application Note Software To help expedite Power Architecture board bringup, this application note describes how to port the CodeWarrior target initialization file from the NXP MPC8555CDS development system to a custom development system. The target initialization file offers many benefits, such as the ability to debug a system before there is working code and a working system. None /docs/en/application-note-software/AN3366.pdf English documents 955336 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN3366.pdf Simplifying Board Bringup: Porting a CodeWarrior<sup>&#174;</sup> Initialization File to Your System /docs/en/application-note-software/AN3366.pdf documents 789425793691620447 Application Note Software N en None D pdf 1 N Simplifying Board Bringup: Porting a CodeWarrior<sup>&#174;</sup> Initialization File to Your System 955.3 KB AN3366 N 1177528532487728727257 /secured/assets/documents/en/application-note-software/AN2810SW.zip 2005-04-14 1113503860374718430905 PSP 57 Aug 15, 2006 Application Note Software AN2810, PowerQUICC<sup>&#174;</sup> UPM Configuration, PowerQUICC, Universal Programmable Machine, Configuration, Application Note Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN2810SW.zip English documents 5555 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN2810SW&appType=license&lang_cd=ja AN2810 Supporting Files /secured/assets/documents/en/application-note-software/AN2810SW.zip documents 789425793691620447 Application Note Software N en Extended zip 2 Y N AN2810 Supporting Files 5.6 KB AN2810SW N 1113503860374718430905 /docs/en/application-note-software/AN2925.pdf 2005-11-18 1132348070221711838446 PSP 58 Nov 18, 2005 Application Note Software This application note describes how to initialize the MPC8560 TSEC controller. The software is written for the TSEC controller and it is tested on the MPC8560ADS board. None /docs/en/application-note-software/AN2925.pdf English documents 449650 None 789425793691620447 2022-12-07 /docs/en/application-note-software/AN2925.pdf AN2925: Initializing the TSEC Controller /docs/en/application-note-software/AN2925.pdf documents 789425793691620447 Application Note Software N en None D pdf 0 N AN2925: Initializing the TSEC Controller 449.7 KB AN2925 N 1132348070221711838446 /docs/en/application-note-software/AN2925SW.zip 2016-10-31 1132348359136747653641 PSP 59 Nov 18, 2005 Application Note Software This application note describes how to initialize the MPC8560 TSEC controller. The software is written for the TSEC controller and it is tested on the MPC8560ADS board. Click-Thru Software Licensing Agreement-No Registration /docs/en/application-note-software/AN2925SW.zip English documents 592810 1395958162559706127527 789425793691620447 2023-10-11 /webapp/sps/download/license.jsp?colCode=AN2925SW&lang_cd=ja AN2925: Initializing the TSEC Controller Software /docs/en/application-note-software/AN2925SW.zip documents 789425793691620447 Application Note Software N en None zip 0 N AN2925: Initializing the TSEC Controller Software 592.8 KB AN2925SW N 1132348359136747653641 /secured/assets/documents/en/application-note-software/AN2804SW.ZIP 2004-12-07 1102438667512710961271 PSP 60 Dec 6, 2004 Application Note Software Software to Accompany Application Note AN2804 Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN2804SW.ZIP English documents 166584 1395958162559706127527 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN2804SW&appType=license&lang_cd=ja Software to Accompany AN2804: Watchdog Timer for the e500 /secured/assets/documents/en/application-note-software/AN2804SW.ZIP documents 789425793691620447 Application Note Software N en Extended ZIP 0 Y N Software to Accompany AN2804: Watchdog Timer for the e500 166.6 KB AN2804SW N 1102438667512710961271 /secured/assets/documents/en/application-note-software/AN2753SW.zip 2004-11-15 1100539527717722164542 PSP 61 Nov 15, 2004 Application Note Software This software in this file provides an example of an application to bring up a basic RapidIO system. The procedure is fully documented in Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC<sup>&#174;</sup> III. Registration With Click-Thru Software Licensing Agreement /secured/assets/documents/en/application-note-software/AN2753SW.zip English documents 531756 0yqzWSYK 789425793691620447 2022-12-07 Y /webapp/Download?colCode=AN2753SW&appType=license&lang_cd=ja Software to Accompany Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC III&#8482; /secured/assets/documents/en/application-note-software/AN2753SW.zip documents 789425793691620447 Application Note Software N en Extended zip 1 Y N Software to Accompany Application Note AN2753: RapidIO Bring-Up Procedure on PowerQUICC III&#8482; 531.8 KB AN2753SW N 1100539527717722164542 エンジニアリング・ブリテン 1 /docs/en/engineering-bulletin/EB622.pdf 2016-10-31 118rHbxM PSP 62 May 9, 2003 Technical Notes This engineering bulletin provides the official mapping between Motorola Book E Implementation Standard APUs and the numberic APU IDs that are used in the APUinfo section. None /docs/en/engineering-bulletin/EB622.pdf English documents 149247 None 389245547230346745 2022-12-07 N /docs/en/engineering-bulletin/EB622.pdf Freescale Semiconductor Book E Implementation Standards: APU ID Reference /docs/en/engineering-bulletin/EB622.pdf documents 389245547230346745 Technical Notes N en None Y pdf 1 N N Freescale Semiconductor Book E Implementation Standards: APU ID Reference 149.2 KB EB622 N 118rHbxM データ・シート 1 /docs/en/data-sheet/MPC8560EC.pdf 2004-12-10 1102695316956752406135 PSP 2 Jan 28, 2008 Data Sheet データ・シート The MPC8560 integrates a PowerPC&#8482; processor core built on Power Architecture&#8482; technology with system logic required for networking, telecommunications, and wireless infrastructure applications. The MPC8560 is a member of the PowerQUICC<sup>&#174;</sup>&#8482; III family of devices that combine system-level support for industry-standard interfaces with processors that implement the embedded category of the Power Architecture technology. None /docs/en/data-sheet/MPC8560EC.pdf English 1268044 None Data Sheet 2022-12-07 /docs/en/data-sheet/MPC8560EC.pdf MPC8560 Data Sheet /docs/en/data-sheet/MPC8560EC.pdf documents 980000996212993340 Data Sheet N Y en None Y t520 pdf 4.2 N MPC8560 Data Sheet 1.3 MB MPC8560EC N 1102695316956752406135 パッケージ情報 1 /docs/en/package-information/FC-PBGAPRES.pdf 2016-10-31 1273780789511716723050 PSP 63 Jul 8, 2015 Package Information This document is a presentation on understanding the FC-PBGA package. None /docs/en/package-information/FC-PBGAPRES.pdf English documents 5219387 None 302435339416912908 2022-12-07 N /docs/en/package-information/FC-PBGAPRES.pdf Flip Chip Plastic Ball Grid Array (FC-PBGA) Presentation /docs/en/package-information/FC-PBGAPRES.pdf documents 302435339416912908 Package Information N en None pdf 1 N N Flip Chip Plastic Ball Grid Array (FC-PBGA) Presentation 5.2 MB FC-PBGAPRES N 1273780789511716723050 ファクト・シート 1 /docs/en/fact-sheet/MPC8560FACT.pdf 2016-10-31 S1026319613038 PSP 1 Jun 15, 2007 Fact Sheet ファクト・シート This fact sheet describes the MPC8560 PowerQUICC<sup>&#174;</sup> integrated communications processor None /docs/en/fact-sheet/MPC8560FACT.pdf English 212155 None Fact Sheet 2022-12-07 N /docs/en/fact-sheet/MPC8560FACT.pdf MPC8560 Fact Sheet /docs/en/fact-sheet/MPC8560FACT.pdf documents 736675474163315314 Fact Sheet N Y en None Y t523 pdf 9 N N MPC8560 Fact Sheet 212.2 KB MPC8560FACT N S1026319613038 ホワイト・ペーパ 4 /docs/en/white-paper/DDRSDRAMWP.pdf 2016-10-31 1208376896761708228520 PSP 65 Apr 16, 2008 White Paper The focus of this white paper is to provide the end user with high level design considerations and/or trade-offs associated with migrating from SDRAM to DDR SDRAM-based designs. None /docs/en/white-paper/DDRSDRAMWP.pdf English documents 735286 None 918633085541740938 2023-06-19 N /docs/en/white-paper/DDRSDRAMWP.pdf Comparison of DDRx and SDRAM /docs/en/white-paper/DDRSDRAMWP.pdf documents 918633085541740938 White Paper N en None Y pdf 0 N N Comparison of DDRx and SDRAM 735.3 KB DDRSDRAMWP N 1208376896761708228520 /docs/en/white-paper/NANDFLASHWP.pdf 2016-10-31 1109024327078700240135 PSP 66 Oct 24, 2005 White Paper White Paper None /docs/en/white-paper/NANDFLASHWP.pdf English documents 246130 None 918633085541740938 2023-06-19 N /docs/en/white-paper/NANDFLASHWP.pdf How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash /docs/en/white-paper/NANDFLASHWP.pdf documents 918633085541740938 White Paper N en None Y pdf 1 N N How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash 246.1 KB NANDFLASHWP N 1109024327078700240135 /docs/en/white-paper/MPC8560WP2.pdf 2003-12-17 1071689613628715204473 PSP 67 Dec 17, 2003 White Paper White Paper None /docs/en/white-paper/MPC8560WP2.pdf English documents 408012 None 918633085541740938 2022-12-07 /docs/en/white-paper/MPC8560WP2.pdf PowerQUICC<sup>&#174;</sup> III&#8482; Overview: Family of Next Generation Integrated Communications Processors /docs/en/white-paper/MPC8560WP2.pdf documents 918633085541740938 White Paper N en None Y pdf 1.0 N PowerQUICC<sup>&#174;</sup> III&#8482; Overview: Family of Next Generation Integrated Communications Processors 408.0 KB MPC8560WP2 N 1071689613628715204473 /docs/en/white-paper/MPC8540CPCIWP.pdf 2003-08-18 1061232347112706857944 PSP 68 Nov 30, 2003 White Paper CompactPCI is a very high performance industrial bus based on the standard PCI electrical specification in a rugged 3U or 6U Eurocard packaging.Compared to standard desktop PCI, CompactPCI supports twice as many PCI slots (8 versus 4) and offers a packaging scheme that is much better suited for use in industrial applications. None /docs/en/white-paper/MPC8540CPCIWP.pdf English documents 579375 None 918633085541740938 2023-06-19 /docs/en/white-paper/MPC8540CPCIWP.pdf Example MPC8540-Based CompactPCI Reference Design /docs/en/white-paper/MPC8540CPCIWP.pdf documents 918633085541740938 White Paper N en None Y pdf 1 N Example MPC8540-Based CompactPCI Reference Design 579.4 KB MPC8540CPCIWP N 1061232347112706857944 ユーザ・ガイド 1 /docs/en/user-guide/MPC8560UG.pdf 2004-10-21 1098392753878714027806 PSP 53 Dec 16, 2004 User Guide user's guide None /docs/en/user-guide/MPC8560UG.pdf English documents 7030165 None 132339537837198660 2023-06-19 /docs/en/user-guide/MPC8560UG.pdf MPC8560 Torridon Design Guide /docs/en/user-guide/MPC8560UG.pdf documents 132339537837198660 User Guide N en None Y pdf 0.1 N MPC8560 Torridon Design Guide 7.0 MB MPC8560UG N 1098392753878714027806 リファレンス・マニュアル 7 /secured/assets/documents/en/reference-manual/EREF_RM.pdf 2016-10-31 1319210247754725815434 PSP 5 Jun 26, 2014 Reference Manual This reference manual describes the resources defined for the Power ISA embedded environment. Registration without Disclaimer /secured/assets/documents/en/reference-manual/EREF_RM.pdf English documents 10448185 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=EREF_RM&lang_cd=ja EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual /secured/assets/documents/en/reference-manual/EREF_RM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 1 Y N EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual 10.4 MB EREF_RM N 1319210247754725815434 /docs/en/reference-manual/e500CORERMAD.pdf 2016-10-31 1152820363245707387417 PSP 6 Sep 11, 2012 Reference Manual E500CORER: This errata document describes corrections to the PowerPC &#8482; e500 Core Family Reference Manual, Revision 1. None /docs/en/reference-manual/e500CORERMAD.pdf English documents 117856 None 500633505221135046 2022-12-07 N /docs/en/reference-manual/e500CORERMAD.pdf E500CORER, Errata to PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/e500CORERMAD.pdf documents 500633505221135046 Reference Manual N en None pdf 1.2 N N E500CORER, Errata to PowerPC ™ e500 Core Family - Reference Manual 117.9 KB E500CORERMAD N 1152820363245707387417 /docs/en/reference-manual/MPC8560RMAD.pdf 2004-06-22 1087920435080705525169 PSP 7 Feb 10, 2010 Reference Manual This errata describes corrections to the MPC8560 reference manual, Rev. 1. None /docs/en/reference-manual/MPC8560RMAD.pdf English documents 527229 None 500633505221135046 2022-12-07 /docs/en/reference-manual/MPC8560RMAD.pdf Errata to the MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual, Rev. 1 /docs/en/reference-manual/MPC8560RMAD.pdf documents 500633505221135046 Reference Manual N en None N pdf 1.4 N Errata to the MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual, Rev. 1 527.2 KB MPC8560RMAD N 1087920435080705525169 /docs/en/reference-manual/E500CORERM.pdf 2016-10-31 111qmdXB PSP 8 May 11, 2005 Reference Manual The primary objective of this user&#8217;s manual is to describe the functionality of the e500 embedded microprocessor core for software and hardware developers. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words in the 64-bit general-purpose registers (GPRs). None /docs/en/reference-manual/E500CORERM.pdf English documents 5707515 None 500633505221135046 2022-12-07 /docs/en/reference-manual/E500CORERM.pdf PowerPC ™ e500 Core Family - Reference Manual /docs/en/reference-manual/E500CORERM.pdf documents 500633505221135046 Reference Manual N en None pdf 1 N PowerPC ™ e500 Core Family - Reference Manual 5.7 MB E500CORERM N 111qmdXB /secured/assets/documents/en/reference-manual/SPEPIM.pdf 2016-10-31 1091558271259713861292 PSP 9 Aug 3, 2004 Reference Manual Programming Interface Manual for the Signal Processing Engine Auxiliary Processing Unit Registration without Disclaimer /secured/assets/documents/en/reference-manual/SPEPIM.pdf English documents 2733347 None 500633505221135046 2022-12-07 Y /webapp/Download?colCode=SPEPIM&lang_cd=ja Signal Processing Engine Auxiliary Processing Unit Programming Interface Manual /secured/assets/documents/en/reference-manual/SPEPIM.pdf documents 500633505221135046 Reference Manual N en Extended Y pdf 0 Y N Signal Processing Engine Auxiliary Processing Unit Programming Interface Manual 2.7 MB SPEPIM N 1091558271259713861292 /docs/en/reference-manual/E500ABIUG.pdf 2003-03-24 111qmW79 PSP 10 Mar 24, 2003 Reference Manual e500 application binary interface user's guide None /docs/en/reference-manual/E500ABIUG.pdf English documents 5780945 None 500633505221135046 2022-12-07 /docs/en/reference-manual/E500ABIUG.pdf PowerPC e500 Application Binary Interface User's Guide /docs/en/reference-manual/E500ABIUG.pdf documents 500633505221135046 Reference Manual N en None Y pdf 1.0 N PowerPC e500 Application Binary Interface User's Guide 5.8 MB E500ABIUG N 111qmW79 /docs/en/reference-manual/MPC8560RM.pdf 2003-11-21 1069435329313720198891 PSP 3 Sep 8, 2004 Reference Manual リファレンス・マニュアル MPC8560 PowerQUICC<sup>&#174;</sup> III Integrated Communications Processor Reference Manual None /docs/en/reference-manual/MPC8560RM.pdf English 12587591 None Reference Manual 2022-12-07 /docs/en/reference-manual/MPC8560RM.pdf MPC8560 Reference Manual /docs/en/reference-manual/MPC8560RM.pdf documents 500633505221135046 Reference Manual N Y en None Y t877 pdf 1 N MPC8560 Reference Manual 12.6 MB MPC8560RM N 1069435329313720198891 製品概要 2 /docs/en/product-brief/QUICC_CODESPB.pdf 2005-06-08 1118266163094700804380 PSP 64 Jun 8, 2005 Product Brief product brief None /docs/en/product-brief/QUICC_CODESPB.pdf English documents 438044 None 899114358132306053 2022-12-07 /docs/en/product-brief/QUICC_CODESPB.pdf QUICC Code Solutions for the PowerQUICC<sup>&#174;</sup> II and PowerQUICC III Families /docs/en/product-brief/QUICC_CODESPB.pdf documents 899114358132306053 Product Brief N en None Y pdf 0 N QUICC Code Solutions for the PowerQUICC<sup>&#174;</sup> II and PowerQUICC III Families 438.0 KB QUICC_CODESPB N 1118266163094700804380 /docs/en/product-brief/MPC8560PB.pdf 2003-12-03 1070483571680732818796 PSP 4 Dec 3, 2003 Product Brief 製品概要 Product Brief None /docs/en/product-brief/MPC8560PB.pdf English 602627 None Product Brief 2022-12-07 /docs/en/product-brief/MPC8560PB.pdf MPC8560 Product Brief /docs/en/product-brief/MPC8560PB.pdf documents 899114358132306053 Product Brief N Y en None Y t532 pdf 0 N MPC8560 Product Brief 602.6 KB MPC8560PB N 1070483571680732818796 true Y Products

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