High Performance 32-bit Microcontroller based on Arm® Cortex®-M3

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Features

  • Arm Cortex-M3 processor, running at frequencies of up to 180 MHz
  • Arm Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions
  • Arm Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC)
  • Non-maskable Interrupt (NMI) input
  • JTAG and Serial Wire Debug
  • ETM and ETB support
  • System tick timer
  • 136 kB SRAM for code and data use
  • 32 kB ROM containing boot code and on-chip software drivers
  • Crystal oscillator with an operating range of 1 MHz to 25 MHz
  • 12 MHz internal RC oscillator trimmed to 1 % accuracy
  • Ultra-low power RTC crystal oscillator
  • Clock output
  • Two PLLs allow CPU operation up to the maximum CPU rate
  • Quad SPI Flash Interface with four lanes and data rates of up to 40 MB/s
  • Four 550 UARTs with DMA support: one UART with full modem interface
  • One UART with IrDA interface
  • One C_CAN 2.0B controller with one channel
  • Two SSP controllers with FIFO and multi-protocol support
  • One Fast-mode Plus I2C-bus interface with monitor mode
  • One standard I2C-bus interface with monitor mode and standard I/O pins
  • One I2S interface with DMA support and with one input and one output
  • External Memory Controller (EMC)
  • SD/MMC card interface
  • Eight-channel General-Purpose DMA (GPDMA) controller
  • Up to 83 General-Purpose Input/Output (GPIO) pins
  • GPIO registers are located on the AHB for fast access
  • State Configurable Timer (SCT) subsystem on AHB
  • Four general-purpose timer/counters with capture and match capabilities
  • One motor control PWM for three-phase motor control
  • One Quadrature Encoder Interface (QEI)
  • Repetitive Interrupt timer (RI timer)
  • Windowed watchdog timer
  • Ultra-low power Real-Time Clock (RTC) on separate power domain
  • Alarm timer; can be battery powered
  • One 10-bit DAC with DMA support and a data conversion rate of 400 kSamples/s
  • Two 10-bit ADCs with DMA support and a data conversion rate of 400 kSamples/s
  • Hardware-based AES security engine programmable through an on-chip API
  • Two 128-bit secure OTP memories for AES key storage and customer use
  • Unique ID for each device
  • Single 3.3 V (2.2 V to 3.6 V) power supply with on-chip voltage regulator
  • RTC power domain can be powered separately by a 3 V battery supply
  • Four reduced power modes
  • Overdrive mode to increase CPU and bus clock frequency
  • Processor wake-up from Sleep mode via wake-up interrupts
  • Wake-up from Deep-sleep, Power-down, and Deep power-down modes
  • Brownout detect with four separate thresholds for interrupt and forced reset
  • Power-On Reset (POR)

Target Applications

  • Industrial
  • Consumer
  • White goods
  • RFID readers
  • e-Metering

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