LPC18S30FET100 | Arm Cortex-M3|32-bit MCU | NXP Semiconductors

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32-Bit Arm® Cortex®-M3 Flashless MCU with Security Features; 200 KB SRAM; Ethernet, Two HS USB, EMC

LPC18S30FET100 アクティブ

The LPC18S30FET100 is a Arm Cortex-M3 based microcontroller with security features for embedded applications. The Arm Cortex-M3 is a next generation core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration.

The LPC18S30FET100 operates at CPU frequencies of up to 180 MHz. The Arm Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The Arm Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.

The LPC18S30FET100 includes 200 kB of on-chip SRAM, security features with AES engine, a quad SPI Flash Interface (SPIFI), a State Configurable Timer/PWM (SCTimer/PWM) subsystem, two High-speed USB controllers, Ethernet, an external memory controller, and multiple digital and analog peripherals.

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Features

  • Processor core
    • Arm Cortex-M3 processor, running at frequencies of up to 180 MHz.
    • Arm Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.
    • Arm Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
    • Non-maskable Interrupt (NMI) input.
    • JTAG and Serial Wire Debug, serial trace, eight breakpoints, and four watch points.
    • Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
    • System tick timer.
  • On-chip memory
    • 200 kB SRAM for code and data use.
    • Multiple SRAM blocks with separate bus access.
    • 64 kB ROM containing boot code and on-chip software drivers.
    • 64 bit One-Time Programmable (OTP) memory for general-purpose use.
    • Two banks (256 bit total) One-Time Programmable (OTP) memory for AES key storage One bank can store an encrypted key for decoding the boot image.
  • AES engine for encryption and decryption of the boot image and data with DMA support and programmable via a ROM-based API.
  • Clock generation unit
    • Crystal oscillator with an operating range of 1 MHz to 25 MHz.
    • 12 MHz internal RC oscillator trimmed to 1.5 % accuracy over temperature and voltage.
    • Ultra-low power RTC crystal oscillator.
    • Three PLLs allow CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. The second PLL is dedicated to the High-speed USB, the third PLL can be used as audio PLL.
    • Clock output.
  • Configurable digital peripherals:
    • State Configurable Timer (SCTimer/PWM) subsystem on AHB.
    • Global Input Multiplexer Array (GIMA) allows to cross-connect multiple inputs and outputs to event driven peripherals like timers, SCTimer/PWM, and ADC0/1.
  • Serial interfaces
    • Quad SPI Flash Interface (SPIFI) with 1-, 2-, or 4-bit data at rates of up to 52 MB per second.
    • 10/100T Ethernet MAC with RMII and MII interfaces and DMA support for high throughput at low CPU load. Support for IEEE 1588 time stamping/advanced time stamping (IEEE 1588-2008 v2).
    • One High-speed USB 2.0 Host/Device/OTG interface with DMA support and on-chip high-speed PHY (USB0).
    • One High-speed USB 2.0 Host/Device interface with DMA support, on-chip full-speed PHY and ULPI interface to an external high-speed PHY (USB1).
    • USB interface electrical test software included in ROM USB stack.
    • Four 550 UARTs with DMA support: one UART with full modem interface; one UART with IrDA interface; three USARTs support UART synchronous mode and a smart card interface conforming to ISO7816 specification.
    • Up to two C_CAN 2.0B controllers with one channel each. Use of C_CAN controller excludes operation of all other peripherals connected to the same bus bridge.
    • Two SSP controllers with FIFO and multi-protocol support. Both SSPs with DMA support.
    • One Fast-mode Plus I2C-bus interface with monitor mode and with open-drain I/O pins conforming to the full I2C-bus specification. Supports data rates of up to 1 Mbit/s.
    • One standard I²C-bus interface with monitor mode and standard I/O pins.
    • Two I²S interfaces with DMA support, each with one input and one output.
  • Digital peripherals
    • External Memory Controller (EMC) supporting external SRAM, ROM, NOR flash, and SDRAM devices.
    • Secure Digital Input Output (SD/MMC) card interface.
    • Eight-channel General-Purpose DMA controller can access all memories on the AHB and all DMA-capable AHB followers
    • Up to 49 General-Purpose Input/Output (GPIO) pins with configurable pull-up/pull-down resistors.
    • GPIO registers are located on the AHB for fast access. GPIO ports have DMA support.
    • Up to eight GPIO pins can be selected from all GPIO pins as edge and level sensitive interrupt sources.
    • Two GPIO group interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins.
    • Four general-purpose timer/counters with capture and match capabilities.
    • Repetitive Interrupt timer (RI timer).
    • Windowed watchdog timer.
    • Ultra-low power Real-Time Clock (RTC) on separate power domain with 256 bytes of battery powered backup registers.
    • Alarm timer; can be battery powered.
  • Analog peripherals
    • One 10-bit DAC with DMA support and a data conversion rate of 400 kSamples/s.
    • Two 10-bit ADCs with DMA support and a data conversion rate of 400 kSamples/s. Up to eight input channels per ADC.
  • Unique ID for each device.
  • Power
    • Single 3.3 V (2.2 V to 3.6 V) power supply with on-chip internal voltage regulator for the core supply and the RTC power domain.
    • RTC power domain can be powered separately by a 3 V battery supply.
    • Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
    • Processor wake-up from Sleep mode via wake-up interrupts from various peripherals.
    • Wake-up from Deep-sleep, Power-down, and Deep power-down modes via external interrupts and interrupts generated by battery powered blocks in the RTC power domain.
    • Brownout detect with four separate thresholds for interrupt and forced reset.
    • Power-On Reset (POR).
  • Available as TFBGA100 package.

Target Applications

  • Communication hubs
  • Automotive aftermarket
  • Power management
  • Consumer health devices
  • Embedded audio applications
  • Industrial control
  • Industrial automation
  • White goods

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購入/パラメータ

1 結果

マッチしていない 0 NRND

パーツ

説明を表示

注文

コンピュータ支援設計 モデル

動作周波数[最大](MHz)

汎用I/O

イーサネット

USB Controllers

USB (speed)

USB (type)

CAN

UART

I2C

SPI

ADCチャンネル

ADCビット

ADC

タイマー

Timer (bits)

SCTimer / PWM

パッケージタイプ

温度範囲

電源電圧 [最小] (V)

電源電圧 [最大] (V)

状況

製品カテゴリー

LPC18S30FET100
データ・シート

180

49

1

2

HS (2x)

host/device

2

4

2

3

2

10

400 ksps

10

32

1

TFBGA100

-40 °C to +85 °C

2.4

3.6

アクティブ

140-LPC1800-

N true 0 PSPLPC18S30FET100ja 13 アプリケーション・ノート Application Note t789 7 エラッタ Errata t522 1 データ・シート Data Sheet t520 1 パッケージ情報 Package Information t790 1 ファクト・シート Fact Sheet t523 1 ユーザ・ガイド User Guide t792 1 レポートまたはプレゼンテーション Training Presentation t878 1 ja ja ja データ・シート Data Sheet 1 1 1.3 English 1442059727389703020020 PSP 7.1 MB None None documents None 1442059727389703020020 /docs/en/data-sheet/LPC18S50_30_10.pdf 7070210 /docs/en/data-sheet/LPC18S50_30_10.pdf LPC18S50_30_10 documents N N 2020-02-05 32-bit ARM Cortex-M3 flashless MCU with security features; up to 200 kB SRAM; Ethernet, two HS USB, LCD, EMC, AES /docs/en/data-sheet/LPC18S50_30_10.pdf /docs/en/data-sheet/LPC18S50_30_10.pdf Data Sheet N 980000996212993340 2022-12-07 pdf N en Feb 5, 2020 980000996212993340 Data Sheet Y N 32-bit ARM Cortex-M3 flashless MCU with security features; up to 200 kB SRAM; Ethernet, two HS USB, LCD, EMC, AES アプリケーション・ノート Application Note 7 2 1.0 English This technical note describes the history of USBD ROM device driver stack, the differences between LPC4300/LPC1800 series and the rest of the MCUs with USB controller, releases of the 1531319964919730710290 PSP 8.6 MB None None documents None 1531319964919730710290 /docs/en/application-note/TN00041.zip 8564695 /docs/en/application-note/TN00041.zip TN00041 documents N N 2018-07-11 USBD Library for LPC4300/LPC1800 series MCUs /docs/en/application-note/TN00041.zip /docs/en/application-note/TN00041.zip Application Note N 645036621402383989 2022-12-07 zip N en Jul 9, 2018 645036621402383989 Application Note Y N USBD Library for LPC4300/LPC1800 series MCUs 3 1 English 1503441357825705814050 PSP 3.2 MB None None documents None 1503441357825705814050 /docs/en/nxp/application-notes/AN12027.zip 3220460 /docs/en/nxp/application-notes/AN12027.zip AN12027 documents N N 2017-08-22 Connecting TFT LCD with LCD controller of LPC MCU /docs/en/nxp/application-notes/AN12027.zip /docs/en/nxp/application-notes/AN12027.zip Application Note N 645036621402383989 2024-12-03 zip N en Aug 22, 2017 645036621402383989 Application Note Y N Connecting TFT LCD with LCD controller of LPC MCU 4 1.0 English 1471322455605716511996 PSP 1.6 MB None None documents None 1471322455605716511996 /docs/en/application-note/AN11853.zip 1584294 /docs/en/application-note/AN11853.zip AN11853 documents N N 2016-08-15 LPC1800 (with Flashless) Low Power Modes and Wake-up Times /docs/en/application-note/AN11853.zip /docs/en/application-note/AN11853.zip Application Note N 645036621402383989 2022-12-07 zip N en Aug 15, 2016 645036621402383989 Application Note Y N LPC1800 (with Flashless) Low Power Modes and Wake-up Times 5 1.0 English 1442088861363730103268 PSP 101.4 MB None None documents None 1442088861363730103268 /docs/en/application-note/AN11643.zip 101379967 /docs/en/application-note/AN11643.zip AN11643 documents N N 2016-08-08 LPC18S/43S00, LPC18/4300 Random Number Generator /docs/en/application-note/AN11643.zip /docs/en/application-note/AN11643.zip Application Note N 645036621402383989 2022-12-07 zip N en Aug 8, 2016 645036621402383989 Application Note Y N LPC18S/43S00, LPC18/4300 Random Number Generator 6 1.0 English 1442087194997719790916 PSP 3.7 MB None None documents None 1442087194997719790916 /docs/en/application-note/AN11651.zip 3662025 /docs/en/application-note/AN11651.zip AN11651 documents N N 2016-07-06 LPC18xx Secondary USB Host bootloader /docs/en/application-note/AN11651.zip /docs/en/application-note/AN11651.zip Application Note N 645036621402383989 2022-12-07 zip N en Mar 6, 2015 645036621402383989 Application Note Y N LPC18xx Secondary USB Host bootloader 7 1.1 English 1442088466676695913457 PSP 1.0 MB None None documents None 1442088466676695913457 /docs/en/application-note/AN11648.zip 1022078 /docs/en/application-note/AN11648.zip AN11648 documents N N 2015-02-26 LPC18Sxx/43Sxx Secure Boot from QSPI Device /docs/en/application-note/AN11648.zip /docs/en/application-note/AN11648.zip Application Note N 645036621402383989 2022-12-07 zip N en Feb 26, 2015 645036621402383989 Application Note Y N LPC18Sxx/43Sxx Secure Boot from QSPI Device 8 1.0 English 1442089096928718181840 PSP 9.9 MB None None documents None 1442089096928718181840 /docs/en/application-note/AN11649.zip 9894781 /docs/en/application-note/AN11649.zip AN11649 documents N N 2015-02-23 LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark /docs/en/application-note/AN11649.zip /docs/en/application-note/AN11649.zip Application Note N 645036621402383989 2022-12-07 zip N en Feb 23, 2015 645036621402383989 Application Note Y N LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark ユーザ・ガイド User Guide 1 9 3.1 English The LPC18xx are Arm Cortex-M3 based microcontrollers for embedded applications. The LPC18xx include up to 200 kB of on-chip SRAM data memory (flashless parts) or up to 136 kB of on-chip SRAM and up to 1 MB of flash (parts with on-chip flash), and running at frequencies of up to 180 MHz. 1442125404931700322438 PSP 11.9 MB Registration without Disclaimer None documents Extended 1442125404931700322438 /secured/assets/documents/en/user-guide/UM10430.pdf 11876375 /secured/assets/documents/en/user-guide/UM10430.pdf UM10430 documents Y N 2017-07-27 LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller /webapp/Download?colCode=UM10430&lang_cd=ja /secured/assets/documents/en/user-guide/UM10430.pdf User Guide N 132339537837198660 2023-06-18 pdf Y en Sep 13, 2019 132339537837198660 User Guide Y N LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller エラッタ Errata 1 10 1.8 English This errata sheet describes both the known functional problems and any deviations from the electrical specifications known at the release date of this document. 1442124292787715652097 PSP 1.3 MB None None documents None 1442124292787715652097 /docs/en/errata/ES_LPC18SX0.pdf 1292338 /docs/en/errata/ES_LPC18SX0.pdf ES_LPC18SX0 documents N N 2018-03-08 Errata sheet LPC18S50, LPC18S30, LPC18S10 /docs/en/errata/ES_LPC18SX0.pdf /docs/en/errata/ES_LPC18SX0.pdf Errata N 155452329886410597 2022-12-07 pdf N en Feb 5, 2020 155452329886410597 Errata Y N Errata sheet LPC18S50, LPC18S30, LPC18S10 ファクト・シート Fact Sheet 1 11 1.0 English 1469853566201737327298 PSP 195.0 KB None None documents None 1469853566201737327298 /docs/en/fact-sheet/LPC18SXXLF.pdf 195000 /docs/en/fact-sheet/LPC18SXXLF.pdf LPC18SXXLF documents N N 2016-07-29 LPC18Sxx Series of MCUs - Fact Sheet /docs/en/fact-sheet/LPC18SXXLF.pdf /docs/en/fact-sheet/LPC18SXXLF.pdf Fact Sheet N 736675474163315314 2022-12-07 pdf N en Jul 28, 2016 736675474163315314 Fact Sheet Y N LPC18Sxx Series of MCUs - Fact Sheet パッケージ情報 Package Information 1 12 1.0 English 1455079270284715349280 PSP 424.0 KB None None documents None 1455079270284715349280 /docs/en/package-information/SOT926-1.pdf 424000 /docs/en/package-information/SOT926-1.pdf SOT926-1 documents N 2016-02-09 plastic thin fine-pitch ball grid array package; 100 balls; body 9 x 9 x 0.7 mm /docs/en/package-information/SOT926-1.pdf /docs/en/package-information/SOT926-1.pdf Package Information N 302435339416912908 2022-12-07 pdf en Feb 8, 2016 302435339416912908 Package Information Y N plastic thin fine-pitch ball grid array package; 100 balls; body 9 x 9 x 0.7 mm レポートまたはプレゼンテーション Training Presentation 1 13 1.1 English 1448047688178696399940 PSP 213.7 KB None None documents None 1448047688178696399940 /docs/en/supporting-information/R_10076.pdf 213731 /docs/en/supporting-information/R_10076.pdf R_10076 documents N N 2016-07-07 Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals /docs/en/supporting-information/R_10076.pdf /docs/en/supporting-information/R_10076.pdf Training Presentation N 501713016990820713 2022-12-07 pdf N en Nov 27, 2015 501713016990820713 Training Presentation Y N Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals false 0 LPC18S30FET100 downloads ja true 1 Y PSP アプリケーション・ノート 7 /docs/en/application-note/TN00041.zip 2018-07-11 1531319964919730710290 PSP 2 Jul 9, 2018 Application Note This technical note describes the history of USBD ROM device driver stack, the differences between LPC4300/LPC1800 series and the rest of the MCUs with USB controller, releases of the None /docs/en/application-note/TN00041.zip English documents 8564695 None 645036621402383989 2022-12-07 N /docs/en/application-note/TN00041.zip USBD Library for LPC4300/LPC1800 series MCUs /docs/en/application-note/TN00041.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N USBD Library for LPC4300/LPC1800 series MCUs 8.6 MB TN00041 N 1531319964919730710290 /docs/en/nxp/application-notes/AN12027.zip 2017-08-22 1503441357825705814050 PSP 3 Aug 22, 2017 Application Note None /docs/en/nxp/application-notes/AN12027.zip English documents 3220460 None 645036621402383989 2024-12-03 N /docs/en/nxp/application-notes/AN12027.zip Connecting TFT LCD with LCD controller of LPC MCU /docs/en/nxp/application-notes/AN12027.zip documents 645036621402383989 Application Note N en None Y zip 1 N N Connecting TFT LCD with LCD controller of LPC MCU 3.2 MB AN12027 N 1503441357825705814050 /docs/en/application-note/AN11853.zip 2016-08-15 1471322455605716511996 PSP 4 Aug 15, 2016 Application Note None /docs/en/application-note/AN11853.zip English documents 1584294 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11853.zip LPC1800 (with Flashless) Low Power Modes and Wake-up Times /docs/en/application-note/AN11853.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC1800 (with Flashless) Low Power Modes and Wake-up Times 1.6 MB AN11853 N 1471322455605716511996 /docs/en/application-note/AN11643.zip 2016-08-08 1442088861363730103268 PSP 5 Aug 8, 2016 Application Note None /docs/en/application-note/AN11643.zip English documents 101379967 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11643.zip LPC18S/43S00, LPC18/4300 Random Number Generator /docs/en/application-note/AN11643.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC18S/43S00, LPC18/4300 Random Number Generator 101.4 MB AN11643 N 1442088861363730103268 /docs/en/application-note/AN11651.zip 2016-07-06 1442087194997719790916 PSP 6 Mar 6, 2015 Application Note None /docs/en/application-note/AN11651.zip English documents 3662025 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11651.zip LPC18xx Secondary USB Host bootloader /docs/en/application-note/AN11651.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC18xx Secondary USB Host bootloader 3.7 MB AN11651 N 1442087194997719790916 /docs/en/application-note/AN11648.zip 2015-02-26 1442088466676695913457 PSP 7 Feb 26, 2015 Application Note None /docs/en/application-note/AN11648.zip English documents 1022078 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11648.zip LPC18Sxx/43Sxx Secure Boot from QSPI Device /docs/en/application-note/AN11648.zip documents 645036621402383989 Application Note N en None Y zip 1.1 N N LPC18Sxx/43Sxx Secure Boot from QSPI Device 1.0 MB AN11648 N 1442088466676695913457 /docs/en/application-note/AN11649.zip 2015-02-23 1442089096928718181840 PSP 8 Feb 23, 2015 Application Note None /docs/en/application-note/AN11649.zip English documents 9894781 None 645036621402383989 2022-12-07 N /docs/en/application-note/AN11649.zip LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark /docs/en/application-note/AN11649.zip documents 645036621402383989 Application Note N en None Y zip 1.0 N N LPC18Sxx/43Sxx Hardware Versus Software AES Benchmark 9.9 MB AN11649 N 1442089096928718181840 エラッタ 1 /docs/en/errata/ES_LPC18SX0.pdf 2018-03-08 1442124292787715652097 PSP 10 Feb 5, 2020 Errata This errata sheet describes both the known functional problems and any deviations from the electrical specifications known at the release date of this document. None /docs/en/errata/ES_LPC18SX0.pdf English documents 1292338 None 155452329886410597 2022-12-07 N /docs/en/errata/ES_LPC18SX0.pdf Errata sheet LPC18S50, LPC18S30, LPC18S10 /docs/en/errata/ES_LPC18SX0.pdf documents 155452329886410597 Errata N en None Y pdf 1.8 N N Errata sheet LPC18S50, LPC18S30, LPC18S10 1.3 MB ES_LPC18SX0 N 1442124292787715652097 データ・シート 1 /docs/en/data-sheet/LPC18S50_30_10.pdf 2020-02-05 1442059727389703020020 PSP 1 Feb 5, 2020 Data Sheet None /docs/en/data-sheet/LPC18S50_30_10.pdf English documents 7070210 None 980000996212993340 2022-12-07 N /docs/en/data-sheet/LPC18S50_30_10.pdf 32-bit ARM Cortex-M3 flashless MCU with security features; up to 200 kB SRAM; Ethernet, two HS USB, LCD, EMC, AES /docs/en/data-sheet/LPC18S50_30_10.pdf documents 980000996212993340 Data Sheet N en None Y pdf 1.3 N N 32-bit ARM Cortex-M3 flashless MCU with security features; up to 200 kB SRAM; Ethernet, two HS USB, LCD, EMC, AES 7.1 MB LPC18S50_30_10 N 1442059727389703020020 パッケージ情報 1 /docs/en/package-information/SOT926-1.pdf 2016-02-09 1455079270284715349280 PSP 12 Feb 8, 2016 Package Information None /docs/en/package-information/SOT926-1.pdf English documents 424000 None 302435339416912908 2022-12-07 /docs/en/package-information/SOT926-1.pdf plastic thin fine-pitch ball grid array package; 100 balls; body 9 x 9 x 0.7 mm /docs/en/package-information/SOT926-1.pdf documents 302435339416912908 Package Information N en None Y pdf 1.0 N plastic thin fine-pitch ball grid array package; 100 balls; body 9 x 9 x 0.7 mm 424.0 KB SOT926-1 N 1455079270284715349280 ファクト・シート 1 /docs/en/fact-sheet/LPC18SXXLF.pdf 2016-07-29 1469853566201737327298 PSP 11 Jul 28, 2016 Fact Sheet None /docs/en/fact-sheet/LPC18SXXLF.pdf English documents 195000 None 736675474163315314 2022-12-07 N /docs/en/fact-sheet/LPC18SXXLF.pdf LPC18Sxx Series of MCUs - Fact Sheet /docs/en/fact-sheet/LPC18SXXLF.pdf documents 736675474163315314 Fact Sheet N en None Y pdf 1.0 N N LPC18Sxx Series of MCUs - Fact Sheet 195.0 KB LPC18SXXLF N 1469853566201737327298 ユーザ・ガイド 1 /secured/assets/documents/en/user-guide/UM10430.pdf 2017-07-27 1442125404931700322438 PSP 9 Sep 13, 2019 User Guide The LPC18xx are Arm Cortex-M3 based microcontrollers for embedded applications. The LPC18xx include up to 200 kB of on-chip SRAM data memory (flashless parts) or up to 136 kB of on-chip SRAM and up to 1 MB of flash (parts with on-chip flash), and running at frequencies of up to 180 MHz. Registration without Disclaimer /secured/assets/documents/en/user-guide/UM10430.pdf English documents 11876375 None 132339537837198660 2023-06-18 Y /webapp/Download?colCode=UM10430&lang_cd=ja LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller /secured/assets/documents/en/user-guide/UM10430.pdf documents 132339537837198660 User Guide N en Extended Y pdf 3.1 Y N LPC18xx Arm<sup>®</sup> Cortex<sup>®</sup>-M3 microcontroller 11.9 MB UM10430 N 1442125404931700322438 レポートまたはプレゼンテーション 1 /docs/en/supporting-information/R_10076.pdf 2016-07-07 1448047688178696399940 PSP 13 Nov 27, 2015 Training Presentation None /docs/en/supporting-information/R_10076.pdf English documents 213731 None 501713016990820713 2022-12-07 N /docs/en/supporting-information/R_10076.pdf Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals /docs/en/supporting-information/R_10076.pdf documents 501713016990820713 Training Presentation N en None Y pdf 1.1 N N Driving LPC1700/LPC1800/LPC4300 with EPSON Crystals 213.7 KB R_10076 N 1448047688178696399940 true Y Products

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