デザイン・ファイル
完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.
QorIQ® P1021/12 Single- and Dual-Core Multi-Protocol Communications Processors
- このページでは、新規設計を推奨しない製品に関する情報を掲載しています。
P1021 and P1012 devices are "Not recommended for new designs", please use the replacement families Power Architecture (T1024, T1014), Arm Architecture (LS1012, LS1023).
The QorIQ® P1 platform series, which includes the P1021 (dual-core) and P1012 (single-core) communications processors, offers the value of extensive integration and extreme power for a wide variety of applications in the networking, telecom, defense and industrial markets. Based on 45 nm technology for low-power implementation, the P1012 and P1021 processors provide single- and dual-core solutions for the 533 MHz to 800 MHz performance range, along with advanced security and a rich set of interfaces.
The P1012 and P1021 processors incorporate QUICC Engine® technology and are perfectly suited for multi-service gateways, Ethernet switch controllers, wireless LAN access points and high-performance general purpose control processor applications with tight thermal constraints. The QorIQ P1012 and P1021 processors are pin-compatible with the P1011, P1020 and P2 platform products, offering a six-chip range of cost-effective solutions. Scaling from a single core at 533 MHz (P1012) to a dual core at 1.2 GHz per core (P2020), the two QorIQ platforms deliver an impressive 4.5x aggregate frequency range.
製品詳細
ブロック図
Features
Core Complex
- Dual (P1021) or single (P1012) high-performance Power Architecture® e500 cores, 32 KB L1 cache, up to 800 MHz
- 256 KB L2 cache with ECC, also configurable as SRAM and stashing memory
Networking Elements
- Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSEC)
- Two SGMII interfaces
- Support for IEEE® 1588
- QUICC Engine® module supporting:
- UTOPIA-L2
- Four T1/E1/HDLC
- TDM
- Two 10/100 Ethernet
Accelerators and Memory Control
- DDR2/3 32-bit memory controller with ECC support
- Integrated security engine
- Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi
- XOR acceleration
Basic Peripherals and Interconnect
- Four-lane SERDES up to 3.125 GHz multiplexed across controllers
- Two PCI Express® Gen1.0 interface controllers
- Two USB 2.0 controllers
- Enhanced Local Bus Controller (eLBC)
- eSDHC
- Dual I²C, DUART, PIC, DMA, GPIO
Additional Features
- Support for PROFIBUS
- NXP® Product Longevity Program
- 689-pin 31x31 mm TePBGA package
購入/パラメータ
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設計・リソース
ソフトウェア
クイック・リファレンス ソフトウェア・タイプ.
3 ソフトウェア・ファイル
-
開発IDEと構築ツール
CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVAL注目
注: より快適にご利用いただくために、ソフトウェアのダウンロードはデスクトップで行うことを推奨します。