Dual-core Cortex®-M4/M0, 264 kB SRAM, 2 HS USB with on-chip PHY, Ethernet, LCD, CAN, AES, SPIFI, SGPIO, SCT

LPC4350FET180 アクティブ

The LPC4350FET180 is an Arm® Cortex®-M4 based digital signal controller with an Arm Cortex-M0 coprocessor designed for embedded applications requiring signal processing. The Arm Cortex-M4 core offers single-cycle Multiply-Accumulate and SIMD instructions and a hardware floating-point unit to support signal processing while the M0 coprocessor handles I/O and digital control processing. The LPC4350FET180 includes 264 kB of data memory, two High Speed USB 2.0 Host/OTG/Devices, advanced configurable peripherals such as the State Configurable Timer (SCT), Serial General Purpose I/O (SGPIO), and SPI Flash Interface (SPIFI) as well as Ethernet, LCD, an external memory controller and multiple digital and analog peripherals.

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Features

  • Arm Cortex-M4 processor, running at frequencies of up to 204 MHz
  • Arm Cortex-M4 built-in Memory Protection Unit (MPU) supporting eight regions
  • Arm Cortex-M4 built-in Nested Vectored Interrupt Controller (NVIC)
  • Hardware floating-point unit
  • Non-maskable Interrupt (NMI) input
  • JTAG and Serial Wire Debug (SWD)
  • System tick timer
  • Arm Cortex-M0 co-processor running at frequencies of up to 204 MHz
  • 264 kB SRAM for code and data use
  • Two 32 kB SRAM blocks with separate bus access
  • 32 kB ROM containing boot code and on-chip software drivers
  • 32 bit One-Time Programmable (OTP) memory for customer use
  • Serial GPIO (SGPIO) interface
  • State Configurable Timer (SCT) subsystem on AHB
  • Quad SPI Flash Interface (SPIFI) with four lanes and up to 40 MB per second
  • 10/100T Ethernet MAC with RMII and MII interfaces and DMA support
  • One High-speed USB 2.0 Host/Device/OTG interface with DMA support
  • One High-speed USB 2.0 Host/Device interface with DMA support
  • One 550 UART with DMA support and full modem interface
  • Three 550 USARTs with DMA and synchronous mode support
  • One C_CAN 2.0B controller with one channel
  • Two SSP controllers with FIFO and multi-protocol support
  • One SPI controller
  • One Fast-mode Plus I2C-bus interface with rates of up to 1 Mbit/s
  • One Fast-mode I2C-bus interface
  • Two I2S interfaces
  • External Memory Controller (EMC) supporting external SRAM, ROM, flash, SDRAM
  • LCD controller with dedicated DMA controller and a selectable display resolution
  • Secure Digital Input Output (SDIO) card interface
  • Eight-channel General-Purpose DMA (GPDMA) controller
  • Up to 118 General-Purpose Input/Output (GPIO) pins
  • Four general-purpose timer/counters with capture and match capabilities
  • One motor control Pulse Width Modulator (PWM) for three-phase motor control
  • One Quadrature Encoder Interface (QEI)
  • Repetitive Interrupt timer (RI timer)
  • Windowed watchdog timer (WWDT)
  • Ultra-low power Real-Time Clock (RTC) on separate power domain
  • Alarm timer; can be battery powered
  • One 10-bit DAC with DMA support and a data conversion rate of 400 kSamples/s
  • Two 10-bit ADCs with DMA support and a data conversion rate of 400 kSamples/s
  • Two 128-bit secure OTP memories for AES key storage and customer use
  • Crystal oscillator with an operating range of 1 MHz to 25 MHz
  • 12 MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy
  • Ultra-low power Real-Time Clock (RTC) crystal oscillator
  • Three PLLs allow CPU operation up to the maximum CPU rate
  • Clock output
  • Single 3.3 V (2.2 V to 3.6 V) power supply with on-chip DC-to-DC converter
  • RTC power domain can be powered separately by a 3 V battery supply
  • Four reduced power modes
  • Processor wake-up from Sleep mode via wake-up interrupts
  • Brownout detect with four separate thresholds for interrupt and forced reset
  • Power-On Reset (POR)
  • see selection guide for features per type

Target Applications

  • Industrial
  • Consumer
  • White goods
  • RFID readers
  • e-Metering

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