Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
VFLGA211: VFLGA211, plastic, very thin fine-pitch land grid array package; 211 balls; 0.5 mm pitch; 9.6 mm x 9.6 mm x 0.805 mm body
12NC: 935352634557
詳細
注文
パラメータ | 値 |
---|---|
Silicon Rev | Rev 2 |
Family | QorIQ LS1012A |
Development Tools | LS1012A-RDB |
Qualification tier | Industrial |
Core Type | Arm Cortex-A53 |
Core: Number of cores (SPEC) | 1 |
Operating Frequency [Max] (MHz) | 600 |
Typical Power | 1.14 |
Cache (KB) | 32 |
L1 Cache (KB) | 32 |
L2 Cache (Max) (KB) | 256 |
SRAM (kB) | 128 |
External Memory Supported | DDR3L SDRAM |
DRAM frequency (max)(MHz) | 1000 |
Serial Audio Interface (SAI) | 5 |
パラメータ | 値 |
---|---|
I2S | 5 |
SPI | 1 |
QSPI | 1 |
UART | 2 |
I2C | 2 |
USB Controllers | 2 |
Ethernet Ports | 2 |
Ethernet Type | 100M, 10M, 1G, 2.5G |
PCIe | 1 |
SATA | 1 x SATA 3.0 |
Encryption | N |
Watchdog timer | Y |
Timers | 2 |
Debug & Trace | JTAG |
Junction Temperature (Min to Max) (℃) | -40 to 105 |
Part/12NC | 鉛フリー | EU RoHS | ハロゲンフリー | RHFインジケーター | REACH SVHC | Weight (mg) |
---|---|---|---|---|---|---|
LS1012AXN7EKB(935352634557) | Yes | Yes Certificate Of Analysis (CoA) | Yes | REACH SVHC | 164.3 |
Part/12NC | 安全保障機能安全 | 吸湿感度レベル (MSL) | Peak Package Body Temperature (PPT) (C°) | Maximum Time at Peak Temperatures (s) | |||
---|---|---|---|---|---|---|---|
鉛フリーはんだ | 鉛フリーはんだ | 鉛フリーはんだ | |||||
LS1012AXN7EKB (935352634557) | No | 3 | 260 | 40 |
Part/12NC | 関税分類番号(米国)免責事項: | 輸出規制品目番号(米国) |
---|---|---|
LS1012AXN7EKB (935352634557) | 854231 | 3A991A1 |
Part/12NC | 発行日 | 有効期限 | PCN | タイトル |
---|---|---|---|---|
LS1012AXN7EKB (935352634557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
The LS1012A processor, optimized for battery-backed or USB-powered, space-constrained networking and IoT applications, integrates a single Arm® Cortex®-A53 core running up to 1GHz with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance in an ultra-small size envelope at 1W typical power dissipation. The LS1012A incorporates the same Trust Architecture and software compatibility of higher-tier LS family devices, enabling scalable, secure applications that leverage a common 64-bit software platform.
Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.