UJA1167TK 製品情報|NXP

UJA1167TK

生産終了 (EOL)

UJA1167TK

生産終了 (EOL)

購入オプション

UJA1167TK,118

生産終了 (EOL)

12NC: 935294637118

詳細

注文

代理店からの注文

UJA1167TK/VX,118

生産終了 (EOL)

12NC: 935294638118

詳細

注文

代理店からの注文

操作機能

パラメータ
Category
SBC; CAN
Supported standards
ISO-11898-2; ISO-11898-5; ISO-11898-6
Low power modes
Standby Mode; Sleep Mode
Supply voltage [min] (V)
3
Supply voltage [max] (V)
40
Data rate [max] (kb/s)
2000
CAN channels
1
LIN channels
0
Voltage on bus pins [min]
-58
Voltage on bus pins [max]
58
パラメータ
VIO option available
No
Recommended Version
100mA
Rth(j-a) (K/W)
60
SPLIT pin
No
Under-voltage detection
Yes
TX Dominant Time out
Yes
Over-temperature detection
Yes
INH / Wake Pin
Yes
Min High Input Levels (V)
0.75 x Vv1

環境

Part/12NC鉛フリーEU RoHSハロゲンフリーRHFインジケーターREACH SVHCWeight (mg)
UJA1167TK,118(935294637118)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
DREACH SVHC
39.9438390816
UJA1167TK/VX,118(935294638118)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
DREACH SVHC
39.951939081599996

品質

Part/12NC安全保障機能安全吸湿感度レベル (MSL)Peak Package Body Temperature (PPT) (C°)
鉛はんだ鉛フリーはんだ鉛はんだ鉛フリーはんだ
UJA1167TK,118
(935294637118)
Quality Managed
1
1
240
260
UJA1167TK/VX,118
(935294638118)
Quality Managed
1
1
240
260

配送

Part/12NC関税分類番号(米国)免責事項:
UJA1167TK,118
(935294637118)
854239
UJA1167TK/VX,118
(935294638118)
854239

詳細 UJA1167TK

The UJA1167 is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2/5 compliant HS-CAN transceiver and an integrated 5 V/100 mA supply for a microcontroller. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1167 can be operated in very low-current Standby and Sleep modes with bus and local wake-up capability and supports ISO 11898-6 compliant autonomous CAN biasing. The microcontroller supply is switched off in Sleep mode. The UJA1167TK version contains a battery-related high-voltage output (INH) for controlling an external voltage regulator, while the UJA1167TK/VX is equipped with a 5 V sensor supply (VEXT).

The UJA1167 implements the standard CAN physical layer as defined in the current ISO11898 standard (-2 and -5). Pending the release of the updated version of ISO11898 including CAN FD, additional timing parameters defining loop delay symmetry are included. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 2 Mbit/s.

A number of configuration settings are stored in non-volatile memory, allowing the SBC to be adapted for use in a specific application. This makes it possible to configure the power-on behavior of the UJA1167 to meet the requirements of different applications.

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