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Mini High-Speed CAN System Basis Chip
- このページでは、新規設計を推奨しない製品に関する情報を掲載しています。
This part is not recommended for new designs. For new designs, we recommend UJA1169ATK.
The UJA1169 is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2:201x (upcoming merged ISO 11898-2/5/6) compliant HS-CAN transceiver and an integrated 5 V or 3.3 V 250 mA scalable supply (V1) for a microcontroller and/or other loads. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1169 can be operated in very low-current Standby and Sleep modes with bus and local wake-up capability.
The UJA1169 comes in six variants. The UJA1169TK, UJA1169TK/F, UJA1169TK/X and UJA1169TK/X/F contain a 5 V regulator (V1). V1 is a 3.3 V regulator in the UJA1169TK/3 and the UJA1169TK/F/3.
The UJA1169TK, UJA1169TK/F, UJA1169TK/3 and UJA1169TK/F/3 variants feature a second on-board 5 V regulator (V2) that supplies the internal CAN transceiver and can also be used to supply additional on-board hardware.
The UJA1169TK/X and UJA1169TK/X/F are equipped with a 5 V supply (VEXT) for off-board components. VEXT is short-circuit proof to the battery, ground and negative voltages. The integrated CAN transceiver is supplied internally via V1, in parallel with the microcontroller.
The UJA1169xx/F variants support ISO 11898-6:2013 and ISO 11898-2:201x compliant CAN partial networking with a selective wake-up function incorporating CAN FD-passive.
CAN FD-passive is a feature that allows CAN FD bus traffic to be ignored in Sleep/Standby mode. CAN FD-passive partial networking is a good fit for networks that support both CAN FD and classic CAN communications. It allows normal CAN controllers that do not need to communicate CAN FD messages to remain in partial networking Sleep/Standby mode during CAN FD communication without generating bus errors.
The UJA1169 implements the standard CAN physical layer as defined in the current ISO11898 standard (-2:2003, -5:2007, -6:2013). Pending the release of the upcoming version of ISO11898-2:201x including CAN FD, additional timing parameters defining loop delay symmetry are included. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 2 Mbit/s.
A dedicated LIMP output pin is provided to flag system failures.
A number of configuration settings are stored in non-volatile memory. This arrangement makes it possible to configure the power-on and limp-home behavior of the UJA1169 to meet the requirements of different applications.
sot1360-1_3d
製品詳細
Features
General
- ISO 11898-2:201x (upcoming merged ISO 11898-2/5/6) compliant 1 Mbit/s high-speed CAN transceiver supporting CAN FD active communication up to 2 Mbit/s in the CAN FD data field (all six variants)
- Autonomous bus biasing according to ISO 11898-6:2013 and ISO 11898-2:201x
- Scalable 5 V or 3.3 V 250 mA low-drop voltage regulator for 5 V/3.3 V microcontroller supply (V1) based on external PNP transistor concept for thermal scaling
- CAN-bus connections are truly floating when power to pin BAT is off
- No ‘false’ wake-ups due to CAN FD traffic (in variants supporting partial networking)
Designed for Automotive Applications
- ±8 kV ElectroStatic Discharge (ESD) protection, according to the Human Body Model (HBM) on the CAN-bus pins
- ±6 kV ESD protection according to IEC 61000-4-2 on pins BAT, WAKE, VEXT and the CAN-bus pins
- CAN-bus pins short-circuit proof to ±58 V
- Battery and CAN-bus pins protected against automotive transients according to ISO 7637-3
- Very low quiescent current in Standby and Sleep modes with full wake-up capability
- Leadless HVSON20 package (3.5 mm x 5.5 mm) with improved Automated Optical Inspection (AOI) capability and low thermal resistance
- Dark green product (halogen free and Restriction of Hazardous Substances (RoHS) compliant)
Low-drop voltage regulator for 5 V/3.3 V microcontroller supply (V1)
- 5 V/3.3 V nominal output; ±2 % accuracy
- 250 mA output current capability
- Thermal management via optional external PNP
- Current limiting above 250 mA
- Support for microcontroller RAM retention down to a battery voltage of 2 V (5 V only)
- Undervoltage reset with selectable detection thresholds of 60 %, 70 %, 80 % or 90% of output voltage, configurable in non-volatile memory (5 V variants only)
- Excellent transient response with a small ceramic output capacitor
- Output is short-circuit proof to GND
- Turned off in Sleep mode
On-board CAN supply (V2; UJA1169TK, UJA1169TK/F, UJA1169TK/3 and UJA1169TK/F/3 only)
- 5 V nominal output; ±2 % accuracy
- 100 mA output current capability
- Current limiting above 100 mA
- Excellent transient response with a small ceramic output capacitor
- Output is short-circuit proof to GND
- User-defined on/off behavior via SPI
Off-board sensor supply (VEXT; UJA1169TK/X and UJA1169TK/X/F only)
- 5 V nominal output; ±2 % accuracy
- 100 mA output current capability
- Current limiting above 100 mA
- Excellent transient response with a small ceramic output load capacitor
- Output is short-circuit proof to BAT, GND and negative voltages down to -18 V
- User-defined on/off behavior via SPI
Power Management
- Standby mode featuring very low supply current; voltage V1 remains active to maintain the supply to the microcontroller
- Sleep mode featuring very low supply current with voltage V1 switched off
- Remote wake-up capability via standard CAN wake-up pattern or ISO 11898-6:2013 and ISO 11898-2:201x compliant selective wake-up frame detection including CAN FD passive support (/F versions only)
- Local wake-up via the WAKE pin
- Wake-up source recognition
System control and diagnostic features
- Mode control via the Serial Peripheral Interface (SPI)
- Overtemperature warning and shutdown
- Watchdog with Window, Timeout and Autonomous modes and microcontrollerindependent clock source
- Optional cyclic wake-up in watchdog Timeout mode
- Watchdog automatically re-enabled when wake-up event captured
- Watchdog period selectable between 8 ms and 4 s supporting remote flash programming via the CAN-bus
- LIMP output pin with configurable activation threshold
- Watchdog failure, RSTN clamping and overtemperature events trigger the dedicated LIMP output signal
- 16-, 24- and 32-bit SPI for configuration, control and diagnosis
- Bidirectional reset pin with variable power-on reset length; configurable in non-volatile memory to support a number of different microcontrollers
- Customer configuration of selected functions via non-volatile memory
- Dedicated modes for software development and end-of-line flashing
購入/パラメータ
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